Conductive memory device with conductive oxide electrodes

A conductive memory device comprising:

• a conductive bottom electrode;
• a multi-resistive state element arranged on top of and in contact with the bottom electrode, the multi-resistive state element having a resistivity;
• and
• a conductive top electrode arranged on top of and in contact with the multi-resistive state element;
• wherein the resistivity of the multi-resistive state element may be changed by applying a first voltage having a first polarity across the conductive electrodes and reversibly changed by applying a second voltage having a second polarity across the conductive electrodes;
• wherein at least one of the conductive electrodes functions as a barrier layer;
• wherein the at least one of the conductive electrodes that functions as a barrier layer includes a conductive oxide;
• and
• wherein:
• the bottom electrode is fabricated prior to the multi-resistive state element;
• the at least one of the conductive electrodes that functions as a barrier layer is the bottom electrode;
• and
• the bottom electrode functions as a seed layer to the multi-resistive state element.

A conductive memory device, comprising:

• a memory element that stores an adjustable resistive value;
• two electrodes that deliver current to the memory element;
• wherein at least one electrode includes a terminal layer that is suitable for connecting the electrode to either a conductive line or a transistor terminal;
• wherein the at least one electrode has an outside face that is defined by the terminal layer and an inside face opposite the outside face;
• and
• wherein the at least one electrode acts as a barrier layer;
• and
• wherein at least one electrode comprises a conductive oxide and functions as a seed layer.

A re-writable memory comprising:

• a substrate;
• a plurality of circuits on the substrate;
• a plurality of x-direction conductive lines oriented in one direction;
• a plurality of y-direction conductive lines in a different direction as the x-direction conductive lines, and crossing the x-direction conductive lines;
• and
• at least one memory array having memory cells located substantially at the intersections of the x-direction conductive lines and y-direction conductive lines;
• wherein each of the memory cells in the memory array includes at least one electrode that acts as a barrier layer;
• and
• wherein each of the memory cells in the memory array includes at least one electrode and the at least one electrode comprises a conductive oxide and functions as a seed layer to at least a portion of the memory cell.