Methods for forming a metal layer on a semiconductor
AssigneeSamsung Electronics Co., Ltd.
InventorsKyung-In Choi, Gil-Heyun Choi, Byung-Hee Kim, Sang-Bum Kang
Life of this patent
Estimating the term…
Loading patent…
AssigneeSamsung Electronics Co., Ltd.
InventorsKyung-In Choi, Gil-Heyun Choi, Byung-Hee Kim, Sang-Bum Kang
Estimating the term…
A metal layer is formed on an integrated circuit device including forming an insulating layer on an integrated circuit substrate. A contact hole is formed by selectively etching the insulating layer to thereby partially expose the substrate. A metal layer including tantalum nitride is formed on the insulating layer including the contact hole using a tantalum precursor including a tantalum element and at least one bonding element that is chemically bonded to the tantalum element. A part of the at least one bonding element include at least one ligand bonding element that is ligand-bonded to the tantalum element. Forming the metal layer may include removing at least some of the ligand bonded elements with a removing gas that is substantially free of hydrogen radicals. The metal layer may be formed using a chemical vapor deposition (CVD) or an atomic layer deposition (ALD) process. A copper or other metal layer may be deposited on the metal layer including tantalum nitride.
A method of forming a metal layer on an integrated circuit device, comprising the steps of:
A method of forming a metal layer on an integrated circuit device, comprising the steps of:
Dependencies are inferred from the claim text.