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US 7,067,372 B2Granted
Method for fabricating a memory cell having a trench
AssigneeInfineon Technologies AG
InventorsMartin Schrems, Rolf Weis
Life of this patent
Estimating the term…
Abstract
A memory cell has a trench, in which a trench capacitor is disposed. Furthermore a vertical transistor is formed in the trench above the trench capacitor. A barrier layer is disposed for the electric connection of the conductive trench filling to a lower doping region of the vertical transistor. The barrier layer is a diffusion barrier for dopants or impurities that are contained in the conductive trench filling.
Claims18
A method for fabricating a memory cell, which comprises the steps of:
- providing a substrate;
- forming a trench in the substrate, the trench having a lower region, a central region, an upper region, and an inner wall;
- subsequently forming an insulation collar in the central region on the inner wall of the trench;
- forming a dielectric layer at least in the lower region of the trench;
- forming a conductive trench filling in the lower region of the trench on the dielectric layer and at least partly in the central region of the trench on the insulation collar;
- forming a barrier layer on the conductive trench filling by thermally growing a thermal silicon nitride, a thermal silicon oxide, or a thermal silicon oxynitride and the conductive trench filing being completely covered by the barrier layer;
- and
- growing epitaxially a layer in the upper region of the trench, on the inner wall of the trench, and on the conductive trench filling, the barrier layer being overgrown laterally, proceeding from the inner wall of the trench, during epitaxial growing of the layer, the barrier layer serving as a barrier with respect to impurities and dislocations migrating from the conductive trench filing into the epitaxially grown layer, and simultaneously the barrier layer allowing transmission of electric charges stored in the conductive trench filing.
5 more elements
A method for fabricating a memory cell, which comprises the steps of:
- providing a substrate;
- forming a trench in the substrate, the trench having a lower region, a central region, an upper region, and an inner wall;
- subsequently forming an insulation collar in the central region on the inner wall of the trench;
- forming a dielectric layer at least in the lower region of the trench;
- forming a conductive trench filling in the lower region of the trench on the dielectric layer and at least partly in the central region of the trench on the insulation collar;
- forming a barrier layer on the conductive trench filling by doping the conductive trench filling and the conductive trench filing being completely covered by the barrier layer;
- and
- growing epitaxially a layer in the upper region of the trench, on the inner wall of the trench, and on the conductive trench filling, the barrier layer being overgrown laterally, proceeding from the inner wall of the trench, during epitaxial growing of the layer, the barrier layer serving as a barrier with respect to impurities and dislocations migrating from the conductive trench filing into the epitaxially grown layer, and simultaneously the barrier layer allowing transmission of electric charges stored in the conductive trench filing.
5 more elements
A method for fabricating a memory cell, which comprises the steps of:
- providing a substrate;
- forming a trench in the substrate, the trench having a lower region, a central region, an upper region, and an inner wall;
- subsequently forming an insulation collar in the central region on the inner wall of the trench;
- forming a dielectric layer at least in the lower region of the trench;
- forming a conductive trench filling with underlying polysilicon and in the lower region of the trench on the dielectric layer and at least partly in the central region of the trench on the insulation collar;
- forming a barrier layer on the conductive trench filling by depositing a metal layer and subsequently performing a silicidizing step on the metal layer with respect to the underlying polysilicon of the conductive trench filing and the conductive trench filing being completely covered by the barrier layer;
- and
- growing epitaxially a layer in the upper region of the trench, on the inner wall of the trench, and on the conductive trench filling, the barrier layer being overgrown laterally, proceeding from the inner wall of the trench, during epitaxial growing of the layer, the barrier layer serving as a barrier with respect to impurities and dislocations migrating from the conductive trench filing into the epitaxially grown layer, and simultaneously the barrier layer allowing transmission of electric charges stored in the conductive trench filing.
5 more elements
Dependencies are inferred from the claim text.