Integrated circuit with protected implantation profiles and method for the formation thereof

A method for manufacturing an integrated circuit structure, comprising:

• providing a semiconductor substrate;
• forming an oxide-nitride-oxide dielectric layer on the semiconductor substrate;
• forming a layer of polysilicon on the oxide-nitride-oxide dielectric layer;
• forming a nitride hardmask layer on the layer of polysilicon;
• patterning and forming a composite mask on the nitride hardinask;
• etching the nitride hardmask, layer of polysilicon, oxide-nitride-oxide dielectric layer, and semiconductor substrate to form shallow trench isolation trenches;
• filling the shallow trench isolation trenches with an oxide gap till;
• polishing the oxide gap fill;
• removing the nitride hardmask;
• covering an array area over the semiconductor substrate with a photoresist mask;
• removing the polysilicon and the oxide-nitride-oxide dielectric in a periphery area;
• performing well and threshold implantation over the periphery area into the semiconductor substrate;
• covering the periphery area over the semiconductor substrate with a photoresist mask;
• and
• performing well and threshold implantation over the array area above the semiconductor substrate into the semiconductor substrate beneath the oxide-nitride-oxide
• dielectric layer.