Method of fabricating an electrical fuse for silicon-on-insulator devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChi-Hsi Wu
Life of this patent
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Abstract
A method and apparatus for providing an electrical fuse is provided. An electrical fuse is patterned from the active layer of a semiconductor-on-insulator (SOI) wafer. One shape of the electrical fuse may be a first and second portion electrically coupled via a third section. The third section is typically thinner than the first and second portion. An ion implant is performed to fully deplete the electrical fuse, and a silicidation process is performed. Thereafter, standard processing techniques may be used to form vias and other integrated circuit structures.
Claims12
A method of forming an electrical fuse, the method comprising the steps of:
- providing a semiconductor-on-insulator wafer having a first layer, an insulator layer, and an active layer;
- etching the active layer of a semiconductor-on-insulator wafer to form the electrical fuse;
- doping the electrical fuse;
- and
- siliciding the surface of the electrical fuse.
A method of forming a semiconductor device, the method comprising the steps of:
- providing a substrate, the substrate having a first layer, an insulator layer formed on the first layer, and an active layer formed on the insulator layer;
- simultaneously forming a source/drain region of a transistor and an electrical fuse in the active layer;
- forming a gate electrode of the transistor on the source/drain region;
- forming lightly-doped drain regions in the source/drain region;
- forming spacers along the side of the gate electrode;
- and
- implanting exposed portions of the source/drain regions and the electrical fuse such that the exposed portions of the source/drain regions and the electrical fuse are substantially fully depleted.
Dependencies are inferred from the claim text.