Method of generating multiple hardware description language configurations for a phase locked loop from a single generic model for integrated circuit design
AssigneeLSI Logic Corporation
InventorKenton T. Dalton
Life of this patent
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Abstract
A method and computer program are disclosed for generating a hardware description language configuration from a generic phase locked loop architecture that include steps of: (a) receiving as input values for a set of configuration variables for a phase locked loop; (b) applying the values for the set of configuration variables to a generic top level model of the phase locked loop to generate a specific configuration of the phase locked loop from the generic top level model; and (c) generating as output a hardware description language code for the specific configuration of the phase locked loop.
Claims20
A method comprising steps of:
- (a) receiving as input values for a set of configuration variables for a phase locked loop;
- (b) applying the values for the set of configuration variables to a generic top level model of the phase locked loop to generate a specific configuration of the phase locked loop from the generic top level model wherein the generic top level model includes a hardware description language module for a frequency generator, a hardware description language module for a phase/frequency correction module, a hardware description language module for a lock detect module, and a hardware description language module for a internal divider module;
- and
- (c) generating as output a hardware description language code for the specific configuration of the phase locked loop.
A computer program product for generating a hardware description language configuration from a generic phase locked loop architecture comprising a medium for embodying a computer program for input to a computer and a computer program embodied in the medium for causing the computer to perform steps of:
- (a) receiving as input values for a set of configuration variables for a phase locked loop;
- (b) applying the values for the set of configuration variables to a generic top level model of the phase locked loop to generate a specific configuration of the phase locked loop from the generic top level model wherein the generic top level model includes a hardware description language module for a frequency generator, a hardware description language module for a phase/frequency correction module, a hardware description language module for a lock detect module, and a hardware description language module for a internal divider module;
- and
- (c) generating as output a hardware description language code for the specific configuration of the phase locked loop.
Dependencies are inferred from the claim text.