Method for modifying the behavior of a state machine
AssigneeInternational Business Machines Corporation
InventorsKenneth J. Goodnow, Clarence R. Ogilvié, Christ pher B. Reynolds, Jack R. Smith, Sebastian T. Ventrone
Life of this patent
Estimating the term…
Abstract
A method and system for modifying the function of a state machine having a programmable logic device. The method includes the steps of modifying a high-level design of the state machine to obtain a modified high-level design of the state machine with a modified function; generating a programmable logic device netlist from differences in the high-level design and the high-level modified design; and installing the modified function into the state machine by programming the programmable logic device based on the programmable logic device netlist.
Claims28
A method for modifying the function of a state machine having a programmable logic device, the method comprising:
- (a) modifying a high-level design of said state machine to obtain a modified high-level design of said state machine with a modified function;
- (b) generating a programmable logic device netlist from differences in said high-level design and said modified high-level design, said generating including extracting a high-level programmable logic device design from said modified high-level design, said extracting including comparing said high-level design to said modified high-level design;
- and
- (c) installing said modified function into said state machine by programming said programmable logic device based on said programmable logic device netlist.
A computer system comprising a processor, an address/data bus coupled to said processor, and a computer-readable memory unit adapted to be coupled to said processor, said memory unit containing instructions that when executed by said processor implement a method for modifying the function of a state machine having a programmable logic device, said method comprising the computer implemented steps of:
- (a) modifying a high-level design of said state machine to obtain a modified high-level design of said state machine with a modified function;
- (b) generating a programmable logic device netlist from differences in said high-level design and said modified high-level design;
- said generating including extracting a high-level programmable logic device design from said modified high-level design, said extracting including comparing said high-level design to said modified high-level design and
- (c) installing said modified function into said state machine by programming said programmable logic device based on said programmable logic device netlist.
The computer system of claim 16, wherein said programming of said programmable logic device includes compiling said programmable logic device netlist into a pattern and applying said pattern to a static random access memory array of an integrated circuit containing said state machine and said programmable logic device.
A method for modifying the function of a state machine having a programmable logic device, the method comprising:
- (a) creating a high-level design of an integrated circuit, said high-level design of said integrated circuit including a high-level design of said state machine;
- (b) modifying said high-level design of said state machine to obtain a modified high-level design of a modified state machine with a modified function;
- (c) extracting the differences between a state machine section of said high-level design and said a state machine section of said modified high level design, said differences including all lines of code in said modified high-level design that are different or not found in said high-level design;
- (d) generating a modified programmable logic array netlist from a programmable logic array netlist and said differences between said high-level design and said modified high-level design, said programmable logic array netlist generated from said high-level design;
- and
- (e) installing said modified function into said state machine of said integrated circuit implemented in hardware by programming said programmable logic array with a software program based on said modified programmable logic array netlist.
A computer system comprising a processor, an address/data bus coupled to said processor, and a computer-readable memory unit adapted to be coupled to said processor, said memory unit containing instructions that when executed by said processor implement a method for modifying the function of a state machine having a programmable logic device, said method comprising the computer implemented method steps of:
- (a) creating a high-level design of an integrated circuit, said high-level design of said integrated circuit including a high-level design of said state machine;
- (b) modifying said high-level design of said state machine to obtain a modified high-level design of a modified state machine with a modified function;
- (c) extracting the differences between a state machine section of said high-level design and said a state machine section of said modified high level design, said differences including all lines of code in said modified high-level design that are different or not found in said high-level design;
- (d) generating a modified programmable logic array netlist from a programmable logic array netlist and said differences between said high-level design and said modified high-level design, said programmable logic array netlist generated from said high-level design;
- and (c) installing said modified function into said state machine of said integrated circuit implemented in hardware by programming said programmable logic array with a software program based on said modified programmable logic array netlist.
Dependencies are inferred from the claim text.