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AssigneeBarcelona Design, Inc.
InventorsMar Hershenson, Arash Hassibi, Andre Hentz, Stephen Boyd
Estimating the term…
A method is described for optimal simultaneous design and floorplanning of integrated circuits. The method is based on formulating the problem as a geometric program, which then can be solved numerically with great efficiency. Prior work discloses the design of many different analog circuit cells such as operational amplifiers, spiral inductors, and LC oscillators which can be cast as geometric programs. The present disclosure adds to this layout floorplanning constraints in posynomial form that can be mixed with design constraints for different analog circuits. This allows the simultaneous design and floorplanning of numerous analog circuits using geometric programming. Thus, the design and floorplanning can be performed optimally in a single step.
In a method for designing a circuit where design parameters for performance specifications are represented by posynomial expressions with constraints and solved with geometric programming, an improvement for simultaneously determining the boundaries for circuit elements in the floorplan of the circuit comprising:
In a method for designing an analog integrated circuit having active circuit elements where design parameters for performance specifications are represented by posynomial expressions with constraints and then solved with geometric programming, an improvement for simultaneously determining the boundaries for the active circuit elements in a floorplan for the integrated circuit, comprising:
A machine readable medium having stored thereon instructions which when executed by a processor cause the processor to perform in a method for designing a circuit where design parameters for performance specifications are represented by posynomial expressions with constraints and solved with geometric programming and for simultaneously determining the boundaries for circuit elements in the floorplan of the circuit, the method, comprising:
A machine readable medium having stored thereon instructions which when executed by a processor cause the processor to perform a method for designing an analog integrated circuit having active circuit elements where design parameters for performance specifications are represented by posynomial expressions with constraints and then solved with geometric programming, and for simultaneously determining the boundaries for the active circuit elements in a floorplan for the integrated circuit, the method comprising:
Dependencies are inferred from the claim text.