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US 7,065,721 B2Granted
Optimized bond out method for flip chip wafers
AssigneeLSI Logic Corporation
InventorsSenol Pekin, Atila Mertol, Wilson Choi
Life of this patent
Estimating the term…
Abstract
A method of optimizing a bond out design includes steps of: (a) receiving as input an initial bond out design including at least one selected I/O pad and a top redistribution layer; (b) determining whether to include a lower redistribution layer in an optimized bond out design; (c) selecting a trace design to be included in the optimized bond out design for connecting the selected I/O pad to the top redistribution layer according to a bump function of the selected I/O pad; and (d) generating as output the optimized bond out design.
Claims25
A method of optimizing a bond out design comprising steps of:
- (a) receiving as input an initial bond out design including at least one selected I/O pad and a top redistribution layer;
- (b) determining whether to include a lower redistribution layer in an optimized bond out design;
- (c) selecting a trace design to be included in the optimized bond out design for connecting the selected I/O pad to the top redistribution layer according to a bump function of the selected I/O pad;
- and
- (d) generating as output the optimized bond out design.
2 more elements
A computer program product for optimizing a bond out design comprising:
- a medium for embodying a computer program for input to a computer;
- and
- a computer program embodied in the medium for causing the computer to perform steps of:
- (a) receiving as input an initial bond out design including at least one selected I/O pad and a top redistribution layer;
- (b) determining whether to include a lower redistribution layer in an optimized bond out design;
- (c) selecting a trace design to be included in the optimized bond out design for connecting the selected I/O pad to the top redistribution layer according to a bump function of the selected I/O pad;
- and
- (d) generating as output the optimized bond out design.
5 more elements
A method of optimizing a bond out design comprising steps of:
- (a) receiving as input an initial bond out design including at least one selected I/O pad and a top redistribution layer;
- (b) if a lower redistribution layer is to be included in an optimized bond out design, then transferring control to (g), else transferring control to (c);
- (c) if a bump function of the selected I/O pad is for a power or ground connection, then transferring control to step (d), else transferring control to step (e);
- (d) selecting a full-width trace to be included in the optimized bond out design for connecting the top redistribution layer to the selected I/O pad and transferring control to step (u);
- (e) if a full-width trace is allowed for the selected I/O pad, then transferring control to step (d), else transferring control to step (f);
- (f) selecting a tapered trace to be included in the optimized bond out design for connecting the top redistribution layer to the selected I/O pad and transferring control to step (u);
- (g) including a lower redistribution layer in the optimized bond out design;
- (h) if the bump function of the selected I/O pad is for a power or ground connection, then transferring control to step (i), else transferring control to step (n);
- (i) if there are no traces routed underneath the selected I/O pad, then transferring control to step (j), else transferring control to step (l);
- (j) connecting the top redistribution layer to the lower redistribution layer in the optimized bond out design by a plurality of inner vias distributed within the projection of the passivation opening onto the lower redistribution layer and by a plurality of outer vias to distribute current evenly between the top redistribution layer and the lower redistribution layer;
- (k) selecting a full-width trace to be included in the optimized bond out design for connecting the top redistribution layer to the selected I/O pad and transferring control to step (u);
- (l) selecting a full-width trace to be included in the optimized bond out design for connecting the top redistribution layer to the selected I/O pad;
- (m) connecting the top redistribution layer to the lower redistribution layer in the optimized bond out design by at least one inner via placed within the projection of the passivation opening onto the lower redistribution layer and by at least one outer via to distribute current evenly between the top redistribution layer and the lower redistribution layer and transferring control to step (u);
- (n) if there are no traces routed underneath the selected I/O pad, then transferring control to step (o), else transferring control to step (q);
- (o) selecting a full-width trace to be included in the optimized bond out design for connecting the top redistribution layer to the selected I/O pad;
- (p) connecting the top redistribution layer to the lower redistribution layer in the optimized bond out design by a plurality of inner vias distributed within the projection of the passivation opening onto the lower redistribution layer and by a plurality of outer vias to distribute current evenly between the top redistribution layer and the lower redistribution layer and transferring control to step (u);
- (q) if a full width trace is possible for the selected I/O pad, then transferring control to step (r), else transferring control to step (s),
- (r) selecting a full-width trace in the optimized bond out design for connecting the top redistribution layer to the selected I/O pad and transferring control to step (t);
- (s) selecting a tapered trace to be included in the optimized bond out design for connecting the top redistribution layer to the selected I/O pad;
- (t) connecting the top redistribution layer to the lower redistribution layer in the optimized bond out design by at least one inner via placed within the projection of the passivation opening onto the lower redistribution layer and by at least one outer via to distribute current evenly between the top redistribution layer and the lower redistribution layer;
- and
- (u) generating as output the optimized bond out design.
19 more elements
Dependencies are inferred from the claim text.