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US 7,065,696 B1Granted
Method and system for providing high-speed forward error correction for multi-stream data
AssigneeBroadLogic Network Technologies, Inc.
InventorsBinfan Liu, Zhongqian Wang, Weimin Zhang
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Abstract
A system for providing a high-speed implementation for multi-stream forward error correction (FEC) is provided. According to one exemplary aspect, the system is able to provide block-based multi-stream FEC that reduces the power consumption when compared with conventional symbol-based FEC. The system provides a pipeline architecture for multi-stream FEC so that modules in the system are able to respectively process blocks of data from different channels or data streams.
Claims23
A system for providing forward error correction, comprising:
- an input buffer configured to receive and store a plurality of symbols from a plurality of channels, wherein upon storing a symbol block belonging to a channel, the input buffer outputs the symbol block, the symbol block being made up of a predetermined number of symbols, wherein upon outputting the symbol block, the input buffer begins to receive and store another symbol block associated with another channel;
- a first decoder configured to receive and process one symbol block belonging to one of the plurality of channels and generate an output, the output including a decoded symbol block and a corresponding channel identifier, wherein upon generating the output, the first decoder receives a next symbol block from the input buffer for processing, the next symbol block associated with one of the plurality of channels;
- a frame synchronizer configured to receive the output from the first decoder, perform frame synchronization on the decoded symbol block, and generate an output, the output including the decoded symbol block and the corresponding channel identifier and frame information used to identify locations of frame boundaries in the decoded symbol block;
- a derandomizer configured to receive the output from the frame synchronizer, derandomize the decoded symbol block and generate an output, the output including a derandomized symbol block and a corresponding channel identifier;
- a deinterleaver having a memory, the deinterleaver configured to receive the output from the derandomizer, combine derandomized symbols in the derandomized symbol block to form a plurality of derandomized words, form one or more write blocks each having a predetermined number of derandomized words, store the one or more write blocks into the memory based on the corresponding channel identifier of the derandomized symbol block during a write session, and read one or more read blocks from the memory based on a specified channel identifier during one or more read sessions;
- a second decoder configured to receive the one or more read blocks, correct any symbol errors therein, and generate an output, the output including one or more decoded blocks;
- and
- a packet synchronization circuit configured to receive the one or more decoded blocks and perform packet synchronization on the decoded blocks to identify packet boundaries within the one or more decoded blocks;
- wherein the input buffer, the first decoder, the frame synchronizer, the derandomizer, the deinterleaver, the second decoder and the packet synchronization circuit are able to respectively process data corresponding to the plurality of channels in a concurrent manner.
6 more elements
A system for providing forward error correction, comprising:
- an input buffer configured to receive and store a plurality of symbols from a plurality of channels, wherein upon storing a symbol block belonging to a channel, the input buffer outputs the symbol block, the symbol block being made up of a predetermined number of symbols, wherein upon outputting the symbol block, the input buffer begins to receive and store another symbol block associated with another channel;
- a trellis coded modulated (TCM) decoder configured to receive and process one symbol block belonging to one of the plurality of channels and generate an output including a TCM-decoded symbol block and a corresponding channel identifier, wherein upon generating the output, the TCM decoder receives a next symbol block from the input buffer for processing, the next symbol block associated with one of the plurality of channels;
- a frame synchronizer configured to receive one TCM-decoded symbol and its corresponding channel identifier from the TCM decoder, perform frame synchronization on the received TCM-decoded symbol block, and generate an output including the received TCM-decoded symbol block and its corresponding channel identifier and frame information used to identify locations of frame boundaries in the received TCM-decoded symbol block, wherein upon generating the output, the frame synchronizer receives a next TCM-decoded symbol block and its corresponding channel identifier from the TCM decoder for processing, and wherein the corresponding channel identifier of the next TCM-decoded symbol block from the TCM decoder is associated with one of the plurality of channels;
- a derandomizer configured to receive one TCM-decoded symbol block from the frame synchronizer, derandomize the received TCM-decoded symbol block and generate an output including a derandomized symbol block and its corresponding channel identifier, wherein upon generating the output, the derandomizer receives a next TCM-decoded symbol block from the frame synchronizer, and wherein the next TCM-decoded symbol block from the frame synchronizer is associated with one of the plurality of channels;
- a deinterleaver having a synchronous dynamic random access memory (SDRAM), the deinterleaver configured to receive one derandomizer symbol block and its corresponding channel identifier from the derandomizer, combine derandomized symbols in the received derandomized symbol block to form a plurality of derandomized words, form one or more write blocks each having a predetermined number of derandomized words, store the one or more write blocks into the memory based on the corresponding channel identifier of the received derandomized symbol block during a write session, and read one or more read blocks from the memory based on a specified channel identifier during one or more read sessions;
- a Reed-Solomon (RS) decoder configured to receive one set of one or more RS blocks from the deinterleaver, wherein the one or more RS blocks are made up of the one or more read blocks retrieved from the SDRAM based on the specified channel identifier, correct any symbol errors therein, and generate an output including one or more decoded RS blocks, wherein upon generating the output, the RS decoder receives another set of one or more RS blocks from the deinterleaver, and wherein this other set of one or more RS blocks are made up of one or more read blocks retrieved from the SDRAM based on another specified channel identifier;
- and
- a packet synchronization circuit configured to receive one set of one or more decoded RS blocks and perform packet synchronization to identify packet boundaries within the one set of one or more decoded RS blocks;
- wherein the input buffer, the TCM decoder, the frame synchronizer, the derandomizer, the deinterleaver, the RS decoder and the packet synchronization circuit are able to respectively process data corresponding to the plurality of channels in a concurrent manner.
6 more elements
Dependencies are inferred from the claim text.