Address translation logic for use in a GPS receiver

A GPS receiver comprising:

• circuitry adapted to provide a serial data stream comprising a plurality of subsets each comprising a plurality of data elements based on a signal received by the GPS receiver;
• memory adapted to receive said serial data stream and store said plurality of data elements for each of said plurality of subsets based on a plurality of translated addresses;
• memory access logic adapted to provide a plurality of sequential addresses;
• and
• address translation logic adapted to translate said plurality of sequential addresses into said plurality of translated addresses such that, for each of said plurality of subsets, said plurality of data elements for said subset are grouped together in said memory.

A GPS receiver comprising:

• circuitry adapted to provide a serial data stream comprising a plurality of subsets each comprising a plurality of data elements based on a baseband signal;
• memory adapted to receive said serial data stream and store said plurality of data elements for each of said plurality of subsets based on a plurality of translated addresses;
• memory access logic adapted to provide a plurality of sequential addresses;
• address translation logic adapted to translate said plurality of sequential addresses into said plurality of translated addresses such that, for each of said plurality of subsets, said plurality of data elements for said subset are grouped together in said memory;
• and
• a receiver frontend adapted to receive a GPS signal and process the GPS signal to provide said baseband signal.

A GPS receiver comprising:

• means for providing a serial data stream comprising a plurality of subsets each comprising a plurality of data elements based on a signal received by the GPS receiver;
• means for storing said plurality of data elements for each of said plurality of subsets based on a plurality of translated addresses;
• means for providing a plurality of sequential addresses;
• and
• means for translating said plurality of sequential addresses into said plurality of translated addresses such that, for each of said plurality of subsets, said plurality of data elements for said subset are grouped together in said means for storing.