US 7,065,595 B2 · Method and apparatus for bus access allocation

Abstract

A method for granting access to a bus is disclosed where a fair arbitration is modified to account for varying conditions. Each bus master (BM) is assigned a Grant Balance Factor value (hereafter GBF) that corresponds to a desired bandwidth from the bus. Arbitration gives priority BMs with a GBF greater than zero in a stratified protocol where requesting BMs with the same highest priority are granted access first. The GBF of a BM is decremented each time an access is granted. Requesting BMs with a GBF equal to zero are fairly arbitrated when there are no requesting BMs with GBFs greater than zero wherein they receive equal access using a frozen arbiter status. The bus access time may be partitioned into bus intervals (BIs) each comprising N clock cycles. BIs and GBFs may be modified to guarantee balanced access over multiple BIs in response to error conditions or interrupts.

Claims40

Dependent claims

A method of managing access to a bus comprising:

(a) partitioning a bus access time to said bus into a plurality of bus intervals (BIs);
(b) assigning, at the beginning of each of said BIs, an initial programmed Grant Balance Factor value (GBF) for each of a plurality of bus masters (BMs) managing access to said bus, generating a corresponding plurality of GBFs, each of said plurality of GBFs corresponding to a requested bus bandwidth;
(c) arbitrating among requesting first BMs within said plurality of BMs, said first BMs having a highest GBF greater than zero during a present BI;
(d) granting a bus access to a selected first BM in response to step (c);
(e) decrementing by one a GBF of said selected first BM;
and
(e1) removing said selected first BM from an arbitration queue of said arbitrating step (c) if its GBF is equal to zero during said present BI.

4 more elements

A method of managing access to a bus comprising:

(a) partitioning a bus access time to said bus into a plurality of bus intervals (BIs);
(b) assigning, at the beginning of each of said BIs, an initial programmed Grant Balance Factor value (GBF) for each of a plurality of bus masters (BMs) managing access to said bus, generating a corresponding plurality of GBFs, each of said plurality of GBFs corresponding to a requested bus bandwidth;
(c) arbitrating among requesting first BMs within said plurality of BMs, said first BMs having a highest GBF greater than zero during a present BI;
(d) granting a bus access to a selected first BM in response to step (c);
(e) decrementing by one a GBF of said selected first BM;
and
(f) removing said selected first BM from an arbitration queue of said arbitrating step (c) if its GBF is equal to zero during said present BI;
(g) arbitrating among requesting second BMs within said plurality of BMs, starting at a present arbitration sequence status, if there are no requesting first BMs, said second BMs having an initial GBF equal to zero during said present BI;
(h) granting a bus access to a selected second BM in response to step (g);
(i) generating said present arbitration sequence status, in response to an expiration of said present BI, by freezing an arbitration sequence from arbitrating said second BMs during said present BI;
(j) resetting all of said plurality of GBFs to their initial programmed value if said present BI has expired;
(k) flagging an error and storing an identification of a missed BM in response to an expiration of said present BI, said missed BM one of said plurality of BMs that requested an access but was not serviced during one of said BIs.

9 more elements

A system-on-a-chip (SOC) integrated circuit comprising:

a central processing unit (CPU);
a random access memory (RAM);
an input/output (I/O) adapter;
a user interface adapter;
a display adapter coupled to a display;
a bus for coupling said CPU, RAM, I/O adapter, user interface adapter, and said display adapter;
a plurality of bus masters (BMs), one of said plurality of bus masters in each of said CPU, I/O adapter, user interface adapter, and said display adapter for managing bus access;
circuitry for partitioning a bus access time to said bus into a plurality of bus intervals (BIs);
circuitry for assigning, at the beginning of each of said BIs, an initial programmed Grant Balance Factor value (GBF) for each of said plurality of BMs managing access to said bus, generating a corresponding plurality of GBFs, each of said plurality of GBFs corresponding to a requested bus bandwidth;
circuitry for arbitrating among requesting first BMs within said plurality of BMs, said first BMs having a highest GBF greater than zero during a present BI;
circuitry for granting a bus access to a selected first BM in response to arbitrating among requesting first BMs;
circuitry for decrementing by one a GBF of said selected first BM;
and
circuitry for removing said selected first BM from an arbitration queue of said fair arbiter if its GBF is equal to zero during said present BI.

11 more elements

A system-on-a-chip (SOC) integrated circuit comprising:

a central processing unit (CPU);
a random access memory (RAM);
an input/output (I/O) adapter;
a user interface adapter;
a display adapter coupled to a display;
a bus for coupling said CPU, RAM, I/O adapter, user interface adapter, and said display adapter;
a plurality of bus masters (BMs), one of said plurality of bus masters in each of said CPU, I/O adapter, user interface adapter, and said display adapter for managing bus access;
circuitry for partitioning a bus access time to said bus into a plurality of bus intervals (BIs);
circuitry for assigning, at the beginning of each of said BIs, an initial programmed Grant Balance Factor value (GBF) for each of said plurality of BMs managing access to said bus, generating a corresponding plurality of GBFs, each of said plurality of GBFs corresponding to a requested bus bandwidth;
circuitry for arbitrating among requesting first BMs within said plurality of BMs, said first BMs having a highest GBF greater than zero during a present BI;
circuitry for granting a bus access to a selected first BM in response to arbitrating among requesting first BMs;
circuitry for decrementing by one a GBF of said selected first BM;
and
circuitry for removing said selected first BM from an arbitration queue of said fair arbiter if its GBF is equal to zero during said present BI;
circuitry for arbitrating among requesting second BMs within said plurality of BMs, starting at a present arbitration sequence status, if there are no requesting first BMs, said second BMs having an initial GBF equal to zero during said present BI;
circuitry for granting a bus access to a selected second BM in response to arbitrating among said requesting second BMs;
circuitry for generating said present arbitration sequence status, in response an expiration of said present BI, by freezing an arbitration sequence from arbitrating said second BMs during said present BI;
circuitry for resetting all of said plurality of GBFs to their initial programmed value if said present BI has expired;
circuitry for flagging an error and storing an identification of a missed BM in response to an expiration of said present BI, said missed BM one of said plurality of BMs that requested an access but was not serviced during one of said BIs.

16 more elements

A method

of managing access to a bus comprising:
(a) partitioning a bus access time to said bus into a plurality of bus intervals (BIs);
(b) assigning, at the beginning of each of said Bk, an initial programmed Grant Balance Factor value (GBF) for each of a plurality of bus masters (BMs) managing access to said bus, generating a corresponding plurality of GBFs, each of said plurality of GBFs corresponding to a requested bus bandwidth;
(c) arbitrating among requesting first BMs within said plurality of BMs, said first BMs having a highest GBF greater than zero during a present BI;
(d) granting a bus access to a selected first BM in response to step (c);
and
(e) decrementing by one a GBF of said selected first BM;
(f) arbitrating among requesting second BMs within said plurality of BMs, starting at a present arbitration sequence status, if there are no requesting first BMs, said second BMs having an initial GBF equal to zero during said present BI;
(g) granting a bus access to a selected second BM in response to step (f);
and
(h) generating said present arbitration sequence status, in response to an expiration of said present BI, by freezing an arbitration sequence from arbitrating said second BMs during said present BI;
resetting all of said plurality of GBFs to their initial programmed value if said present BI has expired;
flagging an error and storing an identification of a missed BM in response to an expiration of said present BI, said missed BM one of said plurality of BMs that requested an access but was not serviced during one of said BIs.

10 more elements

A system-on-a-chip (SOC) integrated circuit comprising:

a central processing unit (CPU);
a random access memory (RAM);
an input/output (I/O) adapter;
a user interface adapter;
a display adapter coupled to a display;
a bus for coupling said CPU, RAM, I/O adapter, user interface adapter, and said display adapter;
a plurality of bus masters (BMs), one of said plurality of bus masters in each of said CPU, I/O adapter, user interface adapter, and said display adapter for managing bus access;
circuitry for partitioning a bus access time to said bus into a plurality of bus intervals (BIs);
circuitry for assigning, at the beginning of each of said BIs, an initial programmed Grant Balance Factor value (GBF) for each of said plurality of BMs managing access to said bus, generating a corresponding plurality of GBFs, each of said plurality of GBFs corresponding to a requested bus bandwidth;
circuitry for arbitrating among requesting first BMs within said plurality of BMs, said first BMs having a highest GBF greater than zero during a present BI;
circuitry for granting a bus access to a selected first BM in response to arbitrating among requesting first BMs;
circuitry for decrementing by one a GBF of said selected first BM;
circuitry for arbitrating among requesting second BMs within said plurality of BMs, starting at a present arbitration sequence status, if there are no requesting first BMs, said second BMs having an initial GBF equal to zero during said present BI;
circuitry for granting a bus access to a selected second BM in response to arbitrating among said requesting second BMs;
circuitry for generating said present arbitration sequence status, in response an expiration of said present BI, by freezing an arbitration sequence from arbitrating said second BMs during said present BI;
circuitry for resetting all of said plurality of GBFs to their initial programmed value if said present BI has expired;
and
circuitry for flagging an error and storing an identification of a missed BM in response to an expiration of said present BI, said missed BM one of said plurality of BMs that requested an access but was not serviced during one of said BIs.

15 more elements

Dependencies are inferred from the claim text.

Method and apparatus for bus access allocation

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Method and apparatus for bus access allocation

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Abstract

Claims40