US 7,065,332 B2Granted

Remote control receiving system

AssigneeMatsushita Electric Industrial Co., Ltd.

InventorsYasuyuki Tomida, Hironobu Mori, Koji Kitamura

Life of this patent

Estimating the term…

Loading patent…

Abstract

A remote control receiving circuit for receiving a remote control signal from a transmitter includes a header interrupt generation circuit that outputs a header interrupt signal when detecting the header of the signal, a data interrupt generation circuit that outputs a data interrupt signal when the header has been detected and the predetermined data receiving is completed, and a switch that selects the header interrupt signal or data interrupt signal in accordance with an instruction of the CPU. A CPU has one interrupt port for receiving the interrupt signal selected by the switch, and performs control in accordance with the received interrupt signal. Therefore, a remote control receiving system can reduce the codes, processing power, and resources of the CPU, which are used to implement the remote control signal receiving function, and reduce the cost of the entire system.

Claims10

Dependent claims

A remote control receiving system that is constituted by a remote control receiving circuit for receiving a remote control signal having a header part, and a data part corresponding to a remote control button depressed;

and a CPU for controlling the remote control receiving circuit to decode the remote control signal received by the remote control receiving circuit,
said remote control receiving circuit comprising:
an edge detection circuit that detects rising edges and falling edges of the remote control signal;
a counter circuit that counts a time interval between a rising edge and a falling edge of the remote control signal, and a time interval between a falling edge and a rising edge;
a header detection circuit that detects the header part of the remote control signal on the basis of the count value of the counter circuit;
a data determination circuit that determines 0 or 1 of the data part in the remote control signal on the basis of the count value of the counter circuit, and stores the determination result in an internal register;
a header interrupt generation circuit that outputs a header interrupt signal notifying detection of the header part in the remote control signal to the CPU, when the header part of the remote control signal is detected by the header detection circuit;
a data interrupt generation circuit that outputs a data interrupt signal notifying a data receiving completion for the remote control signal to the CPU, when data corresponding to the number of bits, which number has been previously specified by the CPU, are stored in the internal register by the data determination circuit after the header part of the remote control signal is detected by the header detection circuit;
and
a switch that selects one of the header interrupt signal and the data interrupt signal in accordance with an instruction of the CPU,
said CPU having one interrupt port, and receiving the interrupt signal through the switch of the remote control receiving circuit, thereby controlling the remote control receiving circuit in accordance with the received interrupt signal, and determining that the remote control button is released when the interrupt signal from the switch is not received during a predetermined time period.

8 more elements

and a CPU for controlling the remote control receiving circuit to decode the remote control signal received by the remote control receiving circuit, wherein
when the data part of the remote control signal is composed of a main data part, and an inverted data part that is obtained by inverting 0 and 1 of the main data part,
said remote control receiving circuit comprises:
an edge detection circuit that detects rising edges and falling edges of the remote control signal;
a counter circuit that counts a time interval between a rising edge and a falling edge of the remote control signal, and a time interval between a falling edge and a rising edge;
a header detection circuit that detects the header part of the remote control signal on the basis of the count value of the counter circuit;
a data determination circuit that determines 0 or 1 of the data part in the remote control signal on the basis of the count value of the counter circuit, and stores the determination result in an internal register;
a validity determination circuit that compares the main data part and the inverted data part of the data stored in the internal register with each other, and determines the data to be valid when all of corresponding bits have different values while determining the data to be invalid in other cases;
an OFF counter that continues to count up until a time period that has been previously specified by the CPU expires, and is reset when one of two conditions, which is specified by the CPU, that the header part of the remote control is detected by the header detection circuit, or that data corresponding to the number of bits, which has been previously specified by the CPU, are stored in the internal register by the data determination circuit and the data stored in the internal register are determined to be valid by the validity determination circuit, is met,
an OFF detection circuit that makes an ON flag rise when the OFF counter is reset, and makes the ON flag fall when the time period that has been previously specified by the CPU and the count value of the OFF counter become equal to each other;
and
a data header flag that is set when the OFF counter is reset, and is reset by the CPU, and
said CPU reads the value of the data header flag and the value of the ON flag in prescribed timings, respectively, and controls the remote control receiving circuit in accordance with the read values.

10 more elements

Dependencies are inferred from the claim text.