Receiver having equalizing demodulator and a non-equalizing demodulator and method for controlling the same
AssigneeFreescale Semiconductor, Inc.
InventorsJames L. Porter, John W. Diehl, Wayne H. Bradley
Life of this patent
Estimating the term…
Loading patent…
AssigneeFreescale Semiconductor, Inc.
InventorsJames L. Porter, John W. Diehl, Wayne H. Bradley
Estimating the term…
A receiver (24) comprises a non-equalizing demodulator (48), an equalizing demodulator (46) and an output control selector (50). The non-equalizing demodulator (48) receives a modulated signal (44) and demodulates the modulated signal (44) to produce a first digital bit stream (54). The equalizing demodulator (46) receives the modulated signal (44) and equalizes and demodulates the modulated signal (44) to produce a second digital bit stream (52). The output control selector (50), coupled to the non-equalizing demodulator (48) and the equalizing demodulator (46), selectively delivers a first one of the first digital bit stream (54) and the second digital bit stream (52) for at least a predetermined period of time (30) before selectively delivering a second one of the first digital bit stream (54) and the second digital bit stream (52) responsive to a predetermined decision criterion (e.g., bit error rate 68). The first one of the first digital bit stream (54) and the second digital bit stream (52) is different from the second one of the first digital bit stream (54) and the second digital bit stream (52).
A receiver comprising:
A receiver comprising:
A receiver comprising:
A method for operating a receiver comprising the steps of:
Dependencies are inferred from the claim text.