System and method for equalizing high-speed data transmission

A system for equalizing a signal, comprising:

• a delay module operable to introduce a delay into an incoming signal to generate a first delayed signal, the incoming signal and the first delayed signal of a first format;
• a switch operable to:
• identify a plurality of drivers operable to receive the incoming signal and the first delayed signal, each of the plurality of drivers having an associated drive strength;
• select a first driver from the plurality of drivers to receive the incoming signal, the selection based at least in part on a comparison of the drive strength associated with the first driver to a maximum output current of the first driver;
• select a second driver from the plurality of drivers to receive the first delayed signal, the selection based at least in part on a comparison of the drive strength associated with the second driver to a maximum output current of the second driver;
• direct the incoming signal to the first driver;
• and
• direct the first delayed signal to the second driver.

Logic for equalizing a signal, the logic embodied in a medium and operable to:

• introduce a delay into an incoming data signal to generate a first delayed signal, the incoming data signal and the first delayed signal of a first format;
• identify a plurality of drivers operable to receive the incoming signal and the first delayed signal, each of the plurality of drivers having an associated drive strength;
• select a first driver from the plurality of drivers to receive the incoming signal, the selection based at least in part on a comparison of the drive strength associated with the first driver to an output current of the first driver;
• select a second driver from the plurality of drivers to receive the first delayed signal, the selection based at least in part on a comparison of the drive strength associated with the second driver to an output current of the second driver;
• direct the incoming signal to the first driver;
• and
• direct the first delayed signal to the second driver.

A system for equalizing a signal, comprising:

• means for introducing a delay into an incoming data signal to generate a first delayed signal, the incoming data signal and the first delayed signal of a first format;
• means for identifying a plurality of drivers operable to receive the incoming signal and the first delayed signal, each of the plurality of drivers having an associated drive strength;
• means for selecting a first driver from the plurality of drivers to receive the incoming signal, the selection based at least in part on a comparison of the drive strength associated with the first driver to a maximum output current of the first driver;
• means for selecting a second driver from the plurality of drivers to receive the first delayed signal, the selection based at least in part on a comparison of the drive strength associated with the second driver to a maximum output current of the second driver;
• means for directing the incoming signal to the first driver;
• and
• means for directing the first delayed signal to the second driver.

A method for equalizing a signal, comprising:

• introducing a delay into an incoming data signal to generate a first delayed signal, the incoming data signal and the first delayed signal of a first format;
• introducing the delay into the first delayed signal to generate a second delayed signal of the first format;
• introducing the delay into the second delayed signal to generate a third delayed signal of the first format;
• introducing the delay into the third delayed signal to generate a fourth delayed signal of the first format;
• identifying a plurality of drivers operable to receive the incoming signal and the first, second, third, and fourth delayed signals, each of the plurality of drivers having an associated drive strength;
• selecting a first driver from the plurality of drivers to receive the incoming signal, the selection based at least in part on a comparison of the drive strength associated with the first driver to a maximum output current of the first driver;
• selecting a second driver from the plurality of drivers to receive the first delayed signal, the selection based at least in part on a comparison of the drive strength associated with the second driver to a maximum output current of the second driver;
• selecting a third driver from the plurality of drivers to receive the second delayed signal, the selection based at least in part on a comparison of the drive strength associated with the third driver to a maximum output current of the third driver;
• selecting a fourth driver from the plurality of drivers to receive the third delayed signal, the selection based at least in part on a comparison of the drive strength associated with the fourth driver to a maximum output current of the fourth driver;
• selecting a fifth driver from the plurality of drivers to receive the fourth delayed signal, the selection based at least in part on a comparison of the drive strength associated with the fifth driver to a maximum output current of the fifth driver;
• directing the incoming signal to the first driver;
• directing the first delayed signal to the second driver;
• directing the second delayed signal to the third driver;
• directing the third delayed signal to the fourth driver;
• directing the fourth delayed signal to the fifth driver;
• and
• converting the incoming signal and the first, second, third, and fourth delayed signals to a second format for data transmission.