Method and apparatus for saving current in a memory device

An electronic system, comprising:

• a processor;
• and
• a memory device coupled to said processor, said memory device comprising:
• a plurality of memory banks, and
• control logic coupled to each memory bank of said plurality of memory banks, wherein:
• said control logic is configured to provide disable control signals to disable one or more of said memory banks during respective periods of precharge, and
• said control logic is configured to provide an enable control signal to activate one or more disabled memory banks subsequent to said respective periods of precharge.

A memory device, comprising:

• a plurality of memory banks;
• a memory controller coupled to each of said memory banks;
• and
• bank control logic coupled to each of said memory banks and said memory controller, wherein said bank control logic is configured to:
• provide control signals to deactivate one or more of said memory banks during respective periods of precharge, and
• provide control signals to activate one or more deactivated memory banks subsequent to said respective periods of precharge.