Capacitive load driving circuit and liquid crystal display

A capacitive load driving circuit for supplying a charging-current to a capacitive load and withdrawing a discharging-current from said capacitive load, the load driving circuit comprising:

• an output circuit which comprises a power supply terminal, a ground terminal, and an output terminal connected to said capacitive load, and which performs a charging-current supplying operation of supplying a charging-current from said power supply terminal to said capacitive load and a discharging-current withdrawing operation of withdrawing a discharging-current from said capacitive load to said ground terminal;
• and
• an overcurrent protection circuit that detects a short circuit between said output terminal and said ground terminal so as to stop or suppress said charging-current supplying operation, and that detects a short circuit between said output terminal and said power supply terminal so as to stop or suppress said discharging-current withdrawing operation, wherein:
• said output circuit selects any one of said charging-current supplying operation and said discharging-current withdrawing operation depending on the state of a control input signal, said output circuit continues to charge said capacitive load in said charging-current supplying operation until the electric potential of said capacitive load reaches a predetermined upper amplitude limit lower than the electric potential of said power supply terminal, and continues to discharge said capacitive load in said discharging-current withdrawing operation until the electric potential of said capacitive load reaches a predetermined lower amplitude limit higher than the electric potential of said ground terminal,
• said output circuit comprises:
• a first NPN transistor the collector of which is connected to said power supply terminal and the emitter of which is connected to said output terminal;
• and a first PNP transistor the collector of which is connected to said ground terminal and the emitter of which is connected to said output terminal, and
• said overcurrent protection circuit comprises:
• a second NPN transistor the collector of which is connected to the base of said first NPN transistor, and the emitter of which is connected to said output terminal, and further the base of which is connected to a first voltage supply for generating a predetermined electric potential that is higher than the electric potential of said ground terminal and lower than or equal to said lower amplitude limit;
• and a second PNP transistor the collector of which is connected to the base of said first PNP transistor, and the emitter of which is connected to said output terminal, and further the base of which is connected to a second voltage supply for generating a predetermined electric potential that is lower than the electric potential of said power supply terminal and higher than or equal to said upper amplitude limit.

A capacitive load driving circuit for supplying a charging-current to a capacitive load and withdrawing a discharging-current from said capacitive load, the load driving circuit comprising:

• an output circuit which comprises a power supply terminal, a ground terminal, and an output terminal connected to said capacitive load, and which performs a charging-current supplying operation of supplying a charging-current from said power supply terminal to said capacitive load and a discharging-current withdrawing operation of withdrawing a discharging-current from said capacitive load to said ground terminal;
• a current generation circuit that selects, depending on the state of a control input signal, any one of a first state where a first current is supplied to said output circuit so as to cause said output circuit to select said charging-current supplying operation and a second state where a second current is supplied to said output circuit so as to cause said output circuit to select said discharging-current withdrawing operation;
• a charging and discharging control circuit that detects the electric potential of said capacitive load and thereby controls and causes said output circuit to continue said charging-current supplying operation until the electric potential of said capacitive load reaches a predetermined upper amplitude limit, to stop said charging-current supplying operation when said electric potential reaches said predetermined upper amplitude limit, to continue said discharging-current withdrawing operation until the electric potential of said capacitive load reaches a predetermined lower amplitude limit, and to stop said discharging-current withdrawing operation when said electric potential reaches said predetermined lower amplitude limit;
• and
• an overcurrent protection circuit that detects a short circuit between said output terminal and said ground terminal so as to stop or suppress said charging-current supplying operation, and that detects a short circuit between said output terminal and said power supply terminal so as to stop or suppress said discharging-current withdrawing operation, wherein:
• said output circuit comprises:
• a first NPN transistor the collector of which is connected to said power supply terminal and the emitter of which is connected to said output terminal;
• and a first PNP transistor the collector of which is connected to said ground terminal and the emitter of which is connected to said output terminal,
• said overcurrent protection circuit comprises:
• a second NPN transistor the collector of which is connected to the base of said first NPN transistor, and the emitter of which is connected to said output terminal, and further the base of which is connected to a first voltage supply for generating a predetermined electric potential that is higher than the electric potential of said ground terminal and lower than or equal to said lower amplitude limit;
• and a second PNP transistor the collector
• of which is connected to the base of said first PNP transistor, and the emitter of which is connected to said output terminal, and further the base of which is connected to a second voltage supply for generating a predetermined electric potential that is lower than the electric potential of said power supply terminal and higher than or equal to said upper amplitude limit, and
• said charging and discharging control circuit controls the base currents of said first NPN transistor and said first PNP transistor, so as to control the execution and the stop of said charging-current supplying operation and said discharging-current withdrawing operation.