US 7,064,734 B2Granted

Display device

AssigneeHitachi, Ltd.

InventorsTetsuya Kawamura, Kazuhiko Yanagawa, Nagatoshi Kurahashi, Tsuyoshi Uchida

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Abstract

A display device includes a substrate having display portion and peripheral portion, a plurality of gate signal lines and a plurality of drain signal lines formed over the substrate, a plurality of switching elements connected to the plurality of gate signal lines and the plurality of drain signal lines and formed over the substrate, and a plurality of pixel electrodes connected to the plurality of switching elements and formed in the display portion. An organic interlayer film is formed in the display portion and the peripheral portion, an insulating film is formed between the substrate and the organic interlayer film in the display portion and the peripheral portion, and the insulating film includes at least one of a plurality of recesses and protuberances.

Claims10

Dependent claims

A display device comprising:

a substrate having a display portion and a peripheral portion;
a plurality of gate signal lines and a plurality of drain signal lines formed over the substrate;
a plurality of switching elements connected to the plurality of gate signal lines and the plurality of drain signal lines and formed over the substrate;
a plurality of pixel electrodes connected to the plurality of switching elements and formed in the display portion;
and
an organic interlayer film formed in the display portion and the peripheral portion;
wherein a first insulating film is formed between the substrate and the organic interlayer film in the display portion and the peripheral portion, and
wherein a plurality of first openings are formed in the first insulating film in the peripheral portion, and the organic interlayer film is filled in the plurality of first openings.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/390,910Filed 19 Mar 2003
Priority: JP 2002-07767820 Mar 2002
Published: US 2003/0231149 A118 Dec 2003
Granted: 20 Jun 2006
Term ends: Not estimatedThe source records don’t support an estimate.

Classification19 codes

G02F 1/134363
Characterised by their geometrical arrangement: for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
G02F 1/133345
Constructional arrangements; Manufacturing methods: insulating layers
G02F 1/136286
Active matrix addressed cells: wiring, e.g. gate line, drain line
G02F 1/1368
Active matrix addressed cells: in which the switching element is a three-electrode device