US 7,064,693 B1Granted

Background comparator offset calibration technique for flash analog-to-digital converters

AssigneeNational Chiao Tung University

InventorsChun-Cheng Huang, Jieh-Tsorng Wu

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Abstract

A background-calibrated comparator and a background-calibrated flash analog-to-digital converter are disclosed for using in mixed-signal integrated circuit design in particular on the high-speed analog-to-digital converter circuit. Without affecting the operation of the comparator, the disclosure is directed at reducing the unpredictable input offset voltage originated from the variation of process parameters and environmental factors. The background-calibrated comparator includes a random chopping comparator, a calibration processor, and a random sequence generator. The background-calibrated flash analog-to-digital converter (ADC) includes a background-calibrated comparator array together with a reference voltage generator, a thermometer code edge detector, and a set of digital encoders.

Claims7

Dependent claims

A background-calibrated comparator, comprising:

a random chopping comparator for comparing an input signal with a reference signal and outputting a digital signal that shows the comparison result;
wherein the random chopping comparator is controlled by an external random sequence to randomly forward or reverse the polarity of the input offset voltage of the comparator without affecting the operation of the comparator;
meanwhile, the input offset voltage of the random chopping comparator is adjusted by the external digital control signal;
a calibration processor, whose input signal is the output signal of the random chopping comparator and the random sequence for controlling the polarity of the offset voltage;
the output of the calibration processor is a digital control signal for adjusting the offset voltage of the random chopping comparator;
the calibration processor operates with the comparator to dynamically calibrate the offset voltage of the comparator;
and
a random sequence generator, which generates a signal with possibility of forward or reverse to serve as a chopping signal of the random chopping comparator;
the possibility of generating a forward or a reversed signal is random, and the probability of each is 50%.

6 more elements

A background-calibrated flash analog-to-digital converter with N-bit resolution, comprising:

a set of reference voltage generators, which generate 2N−1 reference voltages being numbered as the n-th reference voltage sequentially, where n is any integer among 1 to 2N−1;
a comparator array, which compares an input analog signal with the reference voltages and outputs 2N−1 bits of thermometer codes being numbered as the n-th thermometer code bit sequentially, where n is any integer among 1 to 2N−1;
when the analog signal is higher than the n-th reference voltage, the 1st to (n−1)-th thermometer code bits are set as “1” and the other bits are set as “0”;
the comparator array is also provided with background calibration function which automatically calibrates the offset voltages of every comparator in the array so as to gradually adjust the offset voltages to the approximate value of zero;
a thermometer code edge detector (TCED), which inputs 2N−1 bits of thermometer codes and outputs 2N−1 bits of digital signals;
the thermometer code edge detector detects the 0–1 edge of the input thermometer codes and sets the corresponding output digital bits as “1” and the rest as “0”;
a set of digital encoders, which encodes the 2N digital bits outputted from the background-calibrated comparator array as N-bit binary codes;
and
a random sequence generator, which generates random sequences needed by the comparator array.

6 more elements

Dependencies are inferred from the claim text.