Encoder, decoder, and data transfer system

A data transfer system comprising:

• (a) a changing-point counter and a code converter located in a data transmission side;
• the changing-point counter counting changing points of n-bit data (n:
• a positive integer) to generate a counting result, where values of adjoining bits change at each of the changing points;
• the changing-point counter outputting a discrimination bit that has a first value when the counting result exceeds a predetermined value;
• the code converter converting the n-bit data in such a way that bits of the n-bit data located at predetermined positions are inverted when the discrimination bit has the first value, thereby generating an inverted n-bit data;
• and
• the code converter outputting a (n+1)-bit serial code generated by adding the discrimination bit to the inverted n-bit data,
• wherein the changing-point counter conducts its counting operation for (n+1)-bit serial code generated by including a last bit of an immediately preceding (n+1)-bit serial code the data transmission side has dealt to the n-bits of the (n+1)-bit serial code;
• (b) a code deconverter located in a data reception side;
• the code deconverter deconverting the (n+1)-bit serial code outputted from the code converter in such a way that some of the n-bits of the (n+1)-bit serial code located at predetermined positions excluding the discrimination bit are inverted when the discrimination bit has the first value;
• wherein the (n+1)-bit serial code is serially transferred from the data transmission side to the data reception side.

An encoder comprising:

• a changing-point counter for counting changing points of n-bit data(n:
• a positive integer) to generate a counting result, where values of adjoining bits change at each of the changing points, the changing-point counter outputting a discrimination bit that has a first value when the counting result exceeds a predetermined value;
• a delay circuit that receives the discrimination bit and outputs a delayed discrimination bit;
• a code converter for converting the n-bit data in such a way that bits of the n-bit data located at predetermined positions are inverted when the delayed discrimination bit has the first value;
• and
• a parallel-to-serial converter for converting (n+1)-bit data to a (n+1)-bit serial code, the (n+1)-bit data being generated by adding the delayed discrimination bit to an output of the code converter,
• wherein the changing-point counter conducts its counting operation for (n+1)-bit data generated by including a last bit of an immediately preceding n-bit serial code the encoder has dealt to the n-bit serial data.