Speed optimized encoder with running disparity constraint
AssigneeSeagate Technology LLC
InventorJudy L. Westby
Life of this patent
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Abstract
An encoder apparatus is provided, which includes an upper encoder and first and second lower encoders. The upper encoder has an upper encoded output and a corresponding upper running disparity. The first and second lower encoders have respective first and second lower encoded outputs. The first lower encoder generates the first lower encoded output assuming the upper running disparity has a first state. The second lower encoder generates the second lower encoded output assuming the upper running disparity has a second, different state. A multiplexer multiplexes the first and second lower encoded outputs based on the upper running disparity.
Claims15
An encoder apparatus comprising:
- an upper encoder comprising an upper encoded output and a corresponding upper running disparity;
- first and second lower encoders comprising respective first and second lower encoded outputs, wherein the first lower encoder generates the first lower encoded output assuming the upper running disparity has a first state and the second lower encoder generates the second lower encoded output assuming the upper running disparity has a second, different state;
- and
- a multiplexer, which multiplexes the first and second lower encoded outputs based on the upper running disparity.
A method of encoding an input data stream, the method comprising:
- (a) dividing a portion of the input data stream into first and second blocks;
- (b) encoding the first block into an upper encoded block and generating a corresponding upper running disparity;
- (c) encoding the second block into a first lower encoded block assuming the upper running disparity has a first state;
- (d) encoding the second block into a second lower encoded block, in parallel with step (c), assuming the upper running disparity has a second, different state;
- and
- (e) multiplexing the first and second lower encoded outputs based on the upper running disparity.
A decoder apparatus comprising:
- an upper decoder comprising an upper decoded output and a corresponding upper running disparity;
- first and second lower decoders comprising respective first and second lower decoded outputs, wherein the first lower decoder generates the first lower decoded output assuming the upper running disparity has a first state and the second lower decoder generates the second lower decoded output assuming the upper running disparity has a second, different state;
- and
- a multiplexer, which multiplexes the first and second lower decoded outputs based on the upper running disparity.
Dependencies are inferred from the claim text.