Differential input receiver

A differential input receiver providing constant symmetrical hysteresis over a wide input signal range, and comprising:

• a pair of complementary differential comparison devices, each comprising a plurality of comparison elements, and having common input terminals;
• a pair of complementary current sources each having current supply/sink terminals driven by first output terminals of the corresponding differential comparison devices;
• a switched controlled resistance connected across each comparison element in each differential comparison device having a control terminal connected to an input of the corresponding comparison element;
• and
• a pair of series connected inverting buffers connected to a terminal common to a second output of the differential comparison devices to provide the receiver output, respective buffer outputs being fed back to switch terminals of the switched resistance in a manner that provides positive feedback thereby providing equal rise-time, fall-delay and transition times in the receiver output signal.

A method of operating a differential input receiver comprising:

• connecting together input terminals of a pair of complementary differential comparators each comprising a pair of transistors;
• connecting current supply/sink terminals of a pair of series connected complementary current mirrors to output terminals of the corresponding differential comparator;
• connecting a switched controlled resistance across each differential pair transistor in each differential comparator, the switched controlled resistance having a control terminal connected to an first output terminal of the corresponding differential pair transistor;
• and
• connecting a pair of series connected inverting buffers to a terminal common to the second output of the differential comparators to provide the receiver output, the individual buffer outputs being fed back to switch terminals of the controlled resistance in a manner that provides positive feedback thereby providing equal rise-time, fall-delay and transition times in the output signal.

A method of making a differential input receiver comprising:

• connecting together input terminals of a pair of complementary differential comparators each comprising a pair of transistors;
• connecting current supply/sink terminals of a pair of series connected complementary current sources to first output terminals of the corresponding differential comparator;
• connecting a switched controlled resistance across each differential pair transistor in each differential comparator, the switched controlled resistance having a control terminal connected to an output terminal of the corresponding differential pair transistor;
• and
• connecting a pair of series connected inverting buffers to a terminal common to the second output of the differential comparators to provide the receiver output, the individual buffer outputs being fed back to switch terminals of the controlled resistance.