Pass gate circuit with stable operation in transition phase of input signal, self-refresh circuit including the pass gate circuit, and method of controlling the pass gate circuit

A method of controlling a pass gate circuit comprising:

• (a) delaying a first internal control signal and outputting the delayed signal as a second internal control signal;
• (b) outputting a switching control signal having a logic level that depends on the second internal control signal and a comparison signal;
• (c) selectively outputting and blocking an output signal based on the state of the switching control signal, the output signal being obtained by delaying an input signal;
• and
• (d) comparing the level of the input signal with that of the output signal when the first internal control signal is disabled and enabling or disabling the comparison signal according to the result.

A self-refresh circuit of a semiconductor memory device including a memory cell array, the self-refresh circuit comprising:

• a counter which is enabled or disabled in response to the refresh control signal and when enabled creates an input pulse signal periodically;
• a pass gate circuit which is enabled or disabled in response to the refresh control signal and when enabled receives and delays the input pulse signal and outputs the delayed input pulse signal;
• as an output pulse signal;
• a self-refresh controller which creates an internal address signal in response to the output pulse signal;
• and
• a self-refresh operation unit, which consecutively enables word lines of the memory cell array in response to the internal address signal and performs the self-refresh operation;
• wherein the pass gate circuit comprises:
• a pass gate unit, which, in response to a switching control signal, delays the input pulse signal for a fixed duration and outputs the delayed input pulse signal as the output pulse signal;
• and
• a pass gate control unit which outputs the switching control signal, wherein, in response to an internal control signal, the pass gate control unit determines the existence of a transition in the input pulse signal, and enables or disables the switching control signal according to the determination.

A pass gate circuit comprising:

• a pass gate unit, which delays an input signal for a fixed duration and outputs the delayed input signal as an output signal in response to a switching control signal;
• and
• a pass gate control unit that outputs the switching control signal, wherein, in response to a first internal control signal, the pass gate control unit determines the existence of a transition in the input signal, and enables or disables the switching control signal according to the determination;
• wherein the pass gate control unit comprises:
• a delay circuit, which receives the first internal control signal, delays it for the fixed duration, and outputs the delayed first internal control signal as a second internal control signal;
• and
• a comparator, which compares the level of the input signal with that of the output signal in response to the first internal control signal and outputs a comparison signal;
• and
• an output circuit, which outputs the switching control signal in response to the second internal control signal and the comparison signal.