Bus-hold circuit

A bus-hold circuit, comprising:

• a first subcircuit portion operable to provide the bus-hold feature of the circuit, wherein the first subcircuit portion, having an input, includes,
• an inverter coupled between a first node and the input,
• a resistor coupled between a second node and the input,
• a first n-channel device coupled between the second node and ground, the first n-channel device biased by the first node,
• a first p-channel device coupled between the second node and a third node, the first p-channel device biased by the first node, and
• a second p-channel device coupled between the third node and a power supply rail, the second p-channel device biased by the fourth node;
• a second subcircuit portion coupled to the first subcircuit portion for generating over-voltage tolerance and limiting leakage current of the bus-hold circuit, wherein the second subcircuit portion includes,
• a second n-channel device coupled between a fifth node and a sixth node, the second n-channel device biased by the first node,
• a first diode coupled between the fifth node and the sixth node,
• a second diode coupled between the fifth node and a seventh node,
• a third n-channel device coupled between the fifth node and the seventh node, the third n-channel device biased by the sixth node,
• a third p-channel device coupled between the sixth node and the second node, the third p-channel device biased by the power supply rail,
• a fourth n-channel device coupled between ground and the fourth node, the fourth n-channel device biased by the seventh node,
• a fourth p-channel device coupled between the fourth node and the second node, the fourth p-channel device biased by an eight node,
• a fifth p-channel device coupled between the seventh node and the power supply rail, the fifth p-channel device biased by an second node,
• a sixth p-channel device coupled between the eight node and the power supply rail, the sixth p-channel device biased by the eight node,
• a third diode coupled between the power supply rail and the eight node, and
• a fourth diode coupled between the power supply rail and the second node.