Semiconductor device using two types of power supplies supplying different potentials
AssigneeFujitsu Limited
InventorsToshimi Ikeda, Kuninori Kawabata, Shuzo Otsuka
Life of this patent
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Abstract
A semiconductor device which is driven by a first potential, a second potential lower than the first potential, and a third potential lower than the second potential includes a first Pch transistor and a first Nch transistor connected in series between the first potential and the third potential, a second Pch transistor having a drain node thereof connected to a gate node of the first Nch transistor, and a second Nch transistor having a source node thereof connected to a source node of the second Pch transistor, wherein the drain node and gate node of the second Nch transistor are fixed to the second potential and the first potential, respectively.
Claims6
A semiconductor device which is driven by a first potential, a second potential lower than the first potential, and a third potential lower than the second potential, comprising:
- a first Pch transistor and a first Nch transistor connected in series between the first potential and the third potential;
- a second Pch transistor having a drain node thereof connected to a gate node of the first Nch transistor;
- and
- a second Nch transistor having a source node thereof connected to a source node of the second Pch transistor,
- wherein the drain node and gate node of the second Nch transistor are fixed to the second potential and the first potential, respectively.
A semiconductor device which is driven by a first potential, a second potential lower than the first potential, and a third potential lower than the second potential, comprising:
- a circuit, including a first Pch transistor and a first Nch transistor connected in series via a joint point, configured to generate one of the first potential and the third potential at the joint point in response to conductive/non-conductive states of the first Pch transistor and the first Nch transistor;
- a second Pch transistor having a drain node thereof connected to a gate node of the first Nch transistor;
- and
- a second Nch transistor having a source node thereof connected to a source node of the second Pch transistor,
- wherein the drain node and gate node of the second Nch transistor are fixed to the second potential and the first potential, respectively.
Dependencies are inferred from the claim text.