Method and system for adaptively controlling output driver impedance
AssigneeSemtech Corporation
InventorPerry W. Lou
Life of this patent
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Abstract
An adaptive output driver circuit utilizes an initial point matched impedance model to match the impedance of an output driver to the transmission line and produce an initial step voltage into the transmission line that is half of the desired final voltage. The driver output impedance is controlled by comparing a model of the actual working output stage to a target resistance given by the user. Control signals used to calibrate the impedance of the model to match the target are also used to adjust the working output buffer, so that when the impedance of the model matches the target, the impedance of the working buffer also matches the target impedance.
Claims22
A circuit for communicating digital output signals onto a transmission line, comprising:
- a first servo generating a first digital signal defining a model resistance that substantially matches a predetermined impedance of said transmission line;
- a second servo receiving said first digital signal and scaling said model resistance for high (VH) and low (VL) output voltage rails of said transmission line;
- a third servo generating a second digital signal substantially correlating said scaled model resistance to a model transistor array;
- and
- an output driver having a working transistor array adapted to be coupled to said transmission line, said output driver receiving said second digital signal and activating selected transistors of said working transistor array in accordance therewith so that said working transistor array has an impedance substantially corresponding to said scaled model resistance;
- wherein, said impedance of said working transistor array substantially matches said predetermined impedance of said transmission line, and a digital output signal communicated by said output driver onto said transmission line has a voltage that is substantially one-half of a desired final voltage.
A method for communicating digital output signals onto a transmission line, comprising:
- defining a model resistance that substantially matches a predetermined impedance of said transmission line;
- scaling said model resistance for high (VH) and low (VL) output voltage rails of said transmission line;
- correlating said scaled model resistance to a model transistor array;
- and
- activating selected transistors of a working transistor array in accordance with said model transistor array so that an impedance of said working transistor array substantially matches said predetermined impedance of said transmission line;
- and
- communicating a digital output signal onto said transmission line having a voltage that is substantially one-half of a desired final voltage.
Dependencies are inferred from the claim text.