Buried array capacitor and microelectronic structure incorporating the same
AssigneeIndustrial Technology Research Institute
InventorsStephen Chung, Jungle Lee, Shinn-Juh Lay, Randy Wu, Huey-Ru Chang, Yu-Mei Cheng
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Abstract
A unitary buried array capacitor and microelectronic structures incorporating such capacitors are disclosed. A unitary buried array capacitor can be formed by a top layer of electrode, a middle layer of dielectric, and a bottom layer of electrode. A first electrode lead, a second electrode lead and at least one interconnect line pass through the three layers while only the first electrode lead making electrical contact with the top layer of electrode and only the second electrode lead making electrical contact with the bottom electrode.
Claims23
A unitary buried array capacitor comprising:
- a top layer of electrode having a first electrode lead, a second electrode lead and at least one interconnect line therethrough wherein only said first electrode lead making electrical connection with said top layer of electrode;
- a middle layer of dielectric sandwiched between said top layer of electrode and a bottom layer of electrode having said first electrode lead, said second electrode lead and said at least one interconnect line therethrough;
- said bottom layer of electrode having said first electrode lead, said second electrode lead and said at least one interconnect line therethrough wherein only said second electrode lead making electrical connection with said bottom layer of electrode;
- and
- said at least one interconnect line passing through said top, middle and bottom layers without making electrical contact with said top layer or bottom layer.
A buried array capacitor comprising:
- m unitary buried array capacitors each arranged stacked together in an up-an-down relationship with others wherein m being equal or greater than 2 and said unitary buried array capacitor comprises:
- a top layer of electrode having a first electrode lead, a second electrode lead and at least one interconnect line therethrough wherein only said first electrode lead making electrical connection with said top layer of electrode;
- a middle layer of dielectric sandwiched between said top layer of electrode and a bottom layer of electrode having said first electrode lead, said second electrode lead and said at least one interconnect line therethrough;
- said bottom layer of electrode having said first electrode lead, said second electrode lead and said at least one interconnect line therethrough wherein only said second electrode lead making electrical connection with said bottom layer of electrode;
- and
- said at least one interconnect line passing through said top, middle and bottom layers without making electrical contact with said top layer or bottom layer.
A buried array capacitor comprising:
- n unitary buried array capacitors each arranged in a side-by-side relationship with others wherein n being equal or greater than 2 and said unitary buried array capacitor comprises:
- a top layer of electrode having a first electrode lead, a second electrode lead and at least one interconnect line therethrough wherein only said first electrode lead making electrical connection with said top layer of electrode;
- a middle layer of dielectric sandwiched between said top layer of electrode and a bottom layer of electrode having said first electrode lead, said second electrode lead and said at least one interconnect line therethrough;
- said bottom layer of electrode having said first electrode lead, said second electrode lead and said at least one interconnect line therethrough wherein only said second electrode lead making electrical connection with said bottom layer of electrode;
- and
- said at least one interconnect line passing through said top, middle and bottom layers without making electrical contact with said top layer or bottom layer.
A buried array capacitor comprising:
- m unitary buried array capacitors each arranged stacked together in an up-an-down relationship with others;
- and
- n unitary buried array capacitors each arranged in a side-by-side relationship with others, wherein m and n being equal or greater than 2 and said unitary buried array capacitor comprises:
- a top layer of electrode having a first electrode lead, a second electrode lead and at least one interconnect line therethrough wherein only said first electrode lead making electrical connection with said top layer of electrode;
- a middle layer of dielectric sandwiched between said top layer of electrode and a bottom layer of electrode having said first electrode lead, said second electrode lead and said at least one interconnect line therethrough;
- said bottom layer of electrode having said first electrode lead, said second electrode lead and said at least one interconnect line therethrough wherein only said second electrode lead making electrical connection with said bottom layer of electrode;
- and
- said at least one interconnect line passing through said top, middle and bottom layers without making electrical contact with said top layer or bottom layer.
A microelectronic structure incorporating at least one buried array capacitor comprising:
- m unitary buried array capacitors each arranged stacked together in an up-an-down relationship with others;
- and
- n unitary buried array capacitors each arranged in a side-by-side relationship with others, wherein m and n being equal or greater than 2 and said unitary buried array capacitor comprises:
- a top layer of electrode having a first electrode lead, a second electrode lead and at least one interconnect line therethrough wherein only said first electrode lead making electrical connection with said top layer of electrode;
- a middle layer of dielectric sandwiched between said top layer of electrode and a bottom layer of electrode having said first electrode lead, said second electrode lead and said at least one interconnect line therethrough;
- said bottom layer of electrode having said first electrode lead, said second electrode lead and said at least one interconnect line therethrough wherein only said second electrode lead making electrical connection with said bottom layer of electrode;
- said at least one interconnect line passing through said top, middle and bottom layers without making electrical contact with said top layer or bottom layer;
- a first wiring layer on said top layer of electrode;
- a second wiring layer on said bottom layer of electrode;
- and
- at least one integrated circuit device mounted on at least one of said first and said second wiring layers in electrical communication with said buried array capacitor.
Dependencies are inferred from the claim text.