Copper recess process with application to selective capping and electroless plating

A method of forming an integrated circuit structure, said method comprising:

• forming at least one layer of logical and functional devices;
• forming at least one interconnection layer above said layer of logical and functional devices, wherein said forming of said interconnection layer comprises:
• forming an insulator layer;
• forming metal features in said insulator layers;
• recessing said metal features;
• depositing a cap layer over said insulator layer;
• planarizing said insulator layer to form caps only above said metal features;
• and,
• before said depositing of said cap layer, depositing a barrier layer above recessed metal features produced by said recessing process.