US 7,064,022 B1Granted

Method of forming merged FET inverter/logic gate

AssigneeAdvanced Micro Devices, Inc.

InventorsWiley Eugene Hill, Ming-Ren Lin, Bin Yu

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Abstract

A method forms a semiconductor device from a device that includes a first source region, a first drain region, and a first fin structure that are separated from a second source region, a second drain region, and a second fin structure by an insulating layer. The method may include forming a dielectric layer over the device and removing portions of the dielectric layer to create covered portions and bare portions. The method may also include depositing a gate material over the covered portions and bare portions, doping the first fin structure, the first source region, and the first drain region with a first material, and doping the second fin structure, the second source region, and the second drain region with a second material. The method may further include removing a portion of the gate material over at least one covered portion to form the semiconductor device.

Claims20

Dependent claims

A method for forming a semiconductor device, comprising:

forming a fin structure;
forming a source region at one end of the fin structure;
forming a drain region at an opposite end of the fin structure;
forming an insulating layer in the fin structure, source region, and drain region, the insulating layer separating the fin structure into a first fin structure and second fin structure, the source region into a first source region and a second source region, and the drain region into a first drain region and a second drain region, the first fin structure, the first source region, and the first drain region being formed on an opposite side of the insulating layer of the second fin structure, the second source region, and the second drain region;
forming a gate dielectric layer on surfaces of the first and second fin structures, the first and second source regions, the first and second drain regions, and the insulating layer;
removing portions of the gate dielectric layer to create covered portions and bare portions;
depositing a gate material over the covered portions and bare portions;
doping the first fin structure, the first source region, and the first drain region with a first material;
doping the second fin structure, the second source region, and the second drain region with a second material;
and
selectively removing portions of the gate material to form the semiconductor device.

8 more elements

Dependencies are inferred from the claim text.