Method of forming a CMOS transistor
AssigneeAu Optronics Corporation
InventorsKun-Hong Chen, Ming-Yan Chen
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Abstract
A method of forming a CMOS transistor on a substrate is provided, wherein the method requires only two implanting procedures to form all source/drain and light doped region. First, the source/drain of an NMOS transistor is formed by using a photoresist layer which covers up the source/drain of a PMOS transistor as a mask with a phosphorus dopant being implanted into. Next, the lightly doped region of an NMOS transistor and the source/drain of a PMOS transistor are formed by using a photoresist layer which covers up the source/drain of an NMOS transistor as well as the gate as masks with a boron dopant being implanted into. Of which, the dosage of the boron dopant is smaller than that of the phosphorus dopant.
Claims20
A method of forming a Type-I transistor and a Type-II transistor suitable for a liquid crystal display (LCD), comprising:
- providing a substrate;
- forming a first polysilicon layer and a second polysilicon layer corresponding to the Type-I transistor and the Type-II transistor respectively on the substrate;
- blanket depositing a gate insulating layer on the first polysilicon layer, the second polysilicon layer, and the substrate;
- forming a first gate and a second gate on the gate insulating layer respectively corresponding to the first polysilicon layer and the second polysilicon layer;
- performing a first doping using a first type dopant to form a first heavily doped region in the first polysilicon layer beside the first gate;
- and
- performing a second doping using a second type dopant to simultaneously form a second heavily doped region in the second polysilicon layer beside the second gate and form a lightly doped region in parts of the first heavily doped region beside the first gate, wherein the dosage of the second type dopant is smaller than that of the first type dopant.
A method of forming a Type-I transistor and a Type-II transistor suitable for a LCD, comprising:
- providing a substrate;
- forming a first polysilicon layer and a second polysilicon layer corresponding to the Type-I transistor and the Type-II transistor respectively on the substrate;
- blanket depositing a gate insulating layer on the first polysilicon layer, the second polysilicon layer, and the substrate;
- forming a first gate and a second gate on the gate insulating layer respectively corresponding to the first polysilicon layer and the second polysilicon layer;
- forming a first patterned photoresist layer covering up entire region of the Type-II transistor;
- performing a first doping using a first type dopant to form a first heavily doped region in the first polysilicon layer beside the first gate using the first photoresist layer as a mask;
- and
- forming a second patterned photoresist layer covering up the source/drain region of the Type-I transistor;
- performing a second doping using a second type dopant to simultaneously form a second heavily doped region in the second polysilicon layer beside the second gate and form a lightly doped region in parts of the first heavily doped region beside the first gate by using the second photoresist layer as a mask, wherein the dosage of the second type dopant is smaller than that of the first type dopant.
Dependencies are inferred from the claim text.