Integration of ALD tantalum nitride for copper metallization

A method of forming a metal interconnect on a semiconductor substrate, comprising;

• cleaning features formed in a dielectric layer and exposing a conductive material underlying the dielectric layer by generating a plasma in a remote plasma source, delivering radicals from the plasma to a first process chamber which contains the substrate, and contacting the features formed in the dielectric layer with the radicals prior to a barrier layer deposition;
• depositing a tantalum nitride layer by atomic layer deposition within the features at a pressure between 1 and 10 Torr at a temperature between 200 and 300° C. in a second process chamber;
• depositing a tantalum layer by physical vapor deposition over the tantalum nitride layer in a third process chamber;
• plasma etching the tantalum layer and the tantalum nitride in the third process chamber to remove at least a portion of the tantalum layer and the tantalum nitride layer at the bottom of the feature to reveal the conductive material;
• optionally depositing additional tantalum or copper by physical vapor deposition on the tantalum layer;
• and
• depositing a seed layer over the conductive material and the tantalum layer in a fourth processing chamber,
• wherein the first processing chamber, the second processing chamber, the third processing chamber, and the fourth processing chamber are located in an integrated tool.

A method of forming a metal interconnect on a semiconductor substrate, comprising:

• depositing a tantalum nitride barrier layer by atomic layer deposition within the features at a pressure between 1 and 10 Torr at a temperature between 200 and 300°C. in a first process chamber;
• depositing a second barrier layer over the tantalum nitride barrier layer in a second process chamber;
• plasma etching the second barrier layer and the tantalum nitride barrier layer in a third process chamber to remove at least a portion of the second barrier layer and the tantalum nitride barrier layer at a bottom of the feature to reveal the conductive material;
• and
• depositing a seed layer over the conductive material and the second barrier layer in a fourth processing chamber,
• wherein the first processing chamber, the second processing chamber, the third processing chamber, and the fourth processing chamber are located in an integrated tool.

A method of forming a metal interconnect on a semiconductor substrate, comprising;

• cleaning features formed in a dielectric layer and exposing a conductive material underlying the dielectric layer by generating a plasma in a remote plasma source, delivering radicals from the plasma to a first process chamber which contains the substrate, and contacting the features formed in the dielectric layer with the radicals prior to a barrier layer deposition;
• depositing a tantalum nitride barrier layer by atomic layer deposition within the features at a pressure between 1 and 10 Torr at a temperature between 200 and 300°C. in a second process chamber;
• depositing a second barrier layer by physical vapor deposition over the tantalum nitride barrier layer in a third process chamber;
• optionally depositing additional tantalum or copper by physical vapor deposition on the second barrier layer;
• and
• depositing a seed layer over the conductive material and the second barrier layer in a fourth processing chamber,
• wherein the first processing chamber, the second processing chamber, the third processing chamber, and the fourth processing chamber are located in an integrated tool.