Digital filter and method for performing a multiplication based on a look-up table
AssigneeNokia Corporation
InventorsThorsten Schier, Jonas Askeroth, Greger Sjoberg
Life of this patent
Estimating the term…
Loading patent…
AssigneeNokia Corporation
InventorsThorsten Schier, Jonas Askeroth, Greger Sjoberg
Estimating the term…
A digital and a multiplication method are described, which lead to an efficient architecture for a hardware implementation of digital FIR and IIR filters into FPGAs. The multiplications of input sample data and delayed sample data with filter coefficients are performed by addressing look-up tables in which corresponding multiplication results are prestored. The size of the look-up tables is reduced by storing only those multiplication results which cannot be obtained by a shifting operation performed on the other pre-stored multiplication results, the input sample data, or the delayed sample data. Thereby, the size of the look-up tables can be compressed significantly such that an implementation of large digital filters into FPGAs is possible.
A digital filter comprising:
A method for performing digital filtering of input sample data, comprising the steps of:
A method for performing a multiplication based on a look-up table, comprising the steps of:
Dependencies are inferred from the claim text.