MOS transistor gates with thin lower metal silicide and methods for making the same
AssigneeTexas Instruments Incorporated
InventorsRobert William Murto, Luigi Colombo, Mark Robert Visokay
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AssigneeTexas Instruments Incorporated
InventorsRobert William Murto, Luigi Colombo, Mark Robert Visokay
Estimating the term…
Methods are presented for fabricating transistor gate structures, wherein upper and lower metal suicides are formed above a gate dielectric. In one example, the lower silicide is formed by depositing a thin first silicon-containing material over the gate dielectric, which is implanted and then reacted with a first metal by annealing to form the lower silicide. A capping layer can be formed over the first metal prior to annealing, to prevent oxidation of the metal prior to silicidation, and a barrier layer can be formed over the lower silicide to prevent reaction with subsequently formed silicon material. In another example, the lower silicide is a multilayer silicide structure including a plurality of metal silicide sublayers.
A method of fabricating transistor gate structures in a semiconductor device, the method comprising:
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