System clock power management for chips with multiple processing modules
AssigneePortalPlayer, Inc.
InventorJames Richard Terrell, II
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Abstract
A system and method are disclosed for controlling the frequency of a common clock which is shared by a plurality of processing elements. The usage of the common clock by each of the plurality of processing elements is measured, and the common clock is controlled to have a frequency determined as a function of the measured common clock usage by the plurality of processing elements.
Claims20
In a system in which a plurality of processing elements share a common clock, a method comprising the steps of
- a. measuring clock cycle usage of the common clock by each of the plurality of processing elements;
- and
- b. controlling the common clock to have a frequency determined as a function of the measured common clock cycle usage by the plurality of processing elements.
In a system in which a plurality of processing elements share a common clock, a method comprising the steps of
- a. measuring clock cycle usage of the common clock by each of the plurality of processing elements;
- and
- b. controlling the common clock to have a frequency determined as a function of the measured common clock cycle usage by the plurality of processing elements,
- wherein the usage measuring step includes the steps
- measuring clock cycles from the common clock over a selected period;
- for at least two processing elements of the plurality of processing elements, measuring clock cycles from the common clock over the selected period while the at least two processing elements were halted;
- and
- for each of the at least two processing elements, determining a proportion of the selected period during which the at least two processing elements were halted.
In a system in which a plurality of processing elements share a common clock, a method comprising the steps of
- a. measuring clock cycle usage of the common clock by each of the plurality of processing elements;
- and
- b. controlling the common clock to have a frequency determined as a function of the measured common clock cycle usage by the plurality of processing elements,
- wherein the measuring step includes the step of excluding from measured usage the time a processor of the plurality of processors takes to respond to an interrupt which is received while the processor is halted.
A system that controls the frequency of a common clock shared by a plurality of processing elements, comprising
- a. a plurality of counter elements each associated with one of the plurality of processing elements and coupled to count clock cycles of the common clock whenever the associated processing element is in an idle state;
- and
- b. a controller coupled to receive counts from the plurality of counter elements and which controls the common clock to have a frequency determined as a function of the counts from the plurality of counter elements.
Dependencies are inferred from the claim text.