High-frequency active inductor
AssigneeState of Oregon, acting by and through the Board of Higher Education on behalf of Portland State University
InventorsHaiqiao Xiao, Rolf Schaumann, W. Robert Daasch
Life of this patent
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Abstract
An active inductor circuit implemented in sub-micron CMOS semiconductor technology is usable at gigaHertz frequencies and includes an input node, a non-inverting transconductor circuit comprising a differential pair of NMOS transistors connected to the input node, an inverting transconductor circuit comprising an NMOS transistor connected to an output node of the non-inverting transconductor circuit and connected to the input node in a gyrator feedback configuration. Varactors coupled to the transconductor circuits tune the frequency and Q of the active inductor circuit.
Claims30
An active inductor circuit implemented in CMOS semiconductor technology and comprising:
- an input node;
- a non-inverting transconductor circuit connected to the input node;
- an inverting transconductor circuit connected to an output node of the non-inverting transconductor circuit and connected to the input node in a feedback configuration;
- the inverting transconductor circuit comprising an NMOS transistor;
- and further wherein:
- the non-inverting transconductor circuit comprises a differential pair of NMOS transistors having a first gate terminal forming the input node, a second gate terminal connected to a bias source, and a drain terminal forming the said output node, so that the signal path from input node to output node traverses exclusively NMOS devices.
A method of tuning a high-frequency, CMOS implemented active inductor circuit, the method comprising the steps of:
- providing an input node and a non-inverting transconductor circuit connected to the input node;
- deploying an inverting transconductor circuit connected to an output of the non-inverting transconductor circuit and connected to the input node in a feedback configuration so as to form a gyrator circuit;
- providing a first variable capacitor coupled to the inverting transconductor circuit;
- and
- tuning the active inductor circuit by varying a capacitance of the variable capacitor.
A method of tuning a high-frequency, CMOS implemented active inductor circuit, the method comprising the steps of:
- providing an input node and a non-inverting transconductor circuit connected to the input node;
- providing an inverting transconductor circuit connected to an output of the non-inverting transconductor circuit and connected to the input node in a feedback configuration so as to form a gyrator circuit;
- wherein the non-inverting transconductor circuit comprises a differential pair of NMOS transistors;
- providing a first variable capacitor coupled to the differential pair of NMOS transistors;
- and
- tuning the active inductor circuit by varying a capacitance of the first variable capacitor.
An active inductor circuit implemented in CMOS semiconductor technology and comprising:
- a non-inverting transconductor circuit comprising first and second NMOS transistors arranged in a differential pair configuration;
- a gate terminal of the first NMOS transistor defining an input node, and a drain terminal of the second NMOS transistor defining an output node;
- and
- an inverting transconductor circuit comprising a third NMOS transistor connected to the output node of the NMOS differential pair and connected to the input node in a feedback configuration;
- and wherein
- a signal path from the input node to the output node traverses exclusively NMOS devices.
Dependencies are inferred from the claim text.