ACS unit in a decoder
AssigneeSTMicroelectronics S.r.l.
InventorsPascal Urard, Thierry Valentin
Life of this patent
Estimating the term…
Abstract
A device for implementing a function of add-compare-select type in an error correction code decoder, having first and second adders for adding, respectively for first and second branches, branch metric values, intermediate value of former state metrics, and values of former state metric offset, thus forming first and second values of present state metrics; a comparator, coupled to the first and second adders, for selecting the highest value from among the first and second values; circuitry for determining a digital value of present state metric offset including a single bit, based on the first and second values.
Claims21
A device for implementing a function of add-compare-select type in an error correction code decoder, comprising:
- a first adder for adding, for a first branch, a branch metric value, an intermediate value of former state metric, and an offset value of former state metric, thus forming a first value of present state metric;
- a second adder for adding, for a second branch, a branch metric value, an intermediate value of former state metric, and an offset value of former state metric, thus forming a second value of present state metric;
- a comparator, coupled to the first and second adders, for selecting a highest value from among the first and second values of present state metrics;
- a first storage means for storing the selected value of present state metric;
- means for determining a digital offset value of present state metric comprised of a single bit, based on the first and second values of present state metrics;
- and
- a second storage means for storing the offset value of present state metric.
A method for implementing a function of add-compare-select type for an error correction code decoding, comprising the steps of:
- adding, for a first branch, a branch metric value, an intermediate value of former state metric, and an offset value of former state metric, thus forming a first value of present state metric;
- adding, for a second branch, a branch metric value, an intermediate value of former state metric, and an offset value of former state metric, thus forming a second value of present state metric;
- selecting the highest value from the first and second values of present state metrics;
- storing the selected value of present state metric;
- determining a digital offset value of present state metric comprised of a single bit, from the first and second values of present state metrics;
- and
- storing the offset value of present state metric.
An add-compare-select-offset unit of an error correction code decoder, comprising:
- a first adder to add, for a first branch, a branch metric value, an intermediate value of former state metric, and an offset value of former state metric, to produce a first value of present state metric;
- a second adder to add, for a second branch, a branch metric value, an intermediate value of former state metric, and an offset value of former state metric, to produce a second value of present state metric;
- and
- offset circuitry to determine a single-bit offset value of present state metric based on the first and second values of present state metrics.
A method of implementing a function of add-compare-select type for decoding an error correction code, the method comprising:
- adding, for a first branch, a branch metric value, an intermediate value of former state metric, and an offset value of former state metric, to produce a first value of present state metric;
- adding, for a second branch, a branch metric value, an intermediate value of former state metric, and an offset value of former state metric, to produce a second value of present state metric;
- and
- determining a single-bit offset value of present state metric from the first and second values of present state metrics.
Dependencies are inferred from the claim text.