Systems and methods for testing integrated circuits

A system for testing integrated circuits comprising:

• a binary-level test-stimulus generator that transmits a binary-level input signal into an analog circuit located inside an integrated circuit;
• a converter that converts an output signal from the analog circuit into a digital output signal;
• a boundary-scan register chain that transmits the digital output signal out of the integrated circuit;
• and
• a test equipment that receives the digital output signal from the integrated circuit and analyzes the digital output signal to compute at least a first specification of the analog circuit.

A method for testing analog circuits comprising:

• generating a binary-level test stimulus signal whose cycle-period N is equal to a first number of cycle-periods of a system clock;
• generating a reference signal whose cycle-period N′ is equal to a second number of cycle-periods of the system clock;
• providing the binary-level test signal to an analog circuit-under-test;
• providing an output signal from the analog circuit-under-test to a first input of an analog comparator circuit;
• providing the reference signal into a second input of the analog comparator circuit;
• providing an output signal from the analog comparator circuit to a register that is clocked by the system clock so as to produce a digital output data signal;
• and
• analyzing the digital output signal to compute at least a first specification of the analog circuit-under-test.

An IC test system stored on a computer-readable medium, the test system comprising:

• logic configured to transmit a message to initiate testing of an analog circuit located inside of an integrated circuit configured to perform a digital boundary scan test, the testing of the analog circuit comprising:
• providing a binary-level input signal to the analog circuit;
• converting an analog output signal from the analog circuit into a digital output signal;
• and
• transmitting the digital output signal out of the integrated circuit;
• and
• logic configured to analyze the digital output signal to provide at least one specification of the analog circuit.