Apparatus and method for programmable memory access slot assignment

A network switch comprising:

• a plurality of ports configured for transferring data packets;
• and
• an external memory interface configured for transferring the data packets between the network switch and an external memory, the external memory interface including a scheduler for selectively assigning memory access slots to ports for access to the external memory, wherein
• selectively assigning memory access slots by the scheduler is based on a selected one of a plurality of programmable information entries,
• the external memory interface includes an assignment table memory for storing the programmable information entries,
• the selected one of the plurality of programmable information entries is stored in the assignment table memory by an external controller,
• the programmable information entries include a sequence of memory access slot assignments and a port operation code, the scheduler assigns the memory access slots as a continuously repeating sequence based on the sequence of memory access slot assignments, and
• the port operation code includes one of a read bit and a write bit and the scheduler selective assigns each of the memory access slots as one of a read slot and a write slot, based on the corresponding port operation code.

A network switch comprising:

• a plurality of ports configured for transferring data packets;
• and
• an external memory interface configured for transferring the data packets between the network switch and an external memory, the external memory interface including a scheduler for selectively assigning memory access slots to ports for access to the external memory, wherein
• selectively assigning memory access slots by the scheduler is based on respective programmable information entries,
• the external memory interface includes an assignment table memory for storing the respective programmable information entries,
• the programmable information entries are stored in the assignment table memory by an external controller,
• the programmable information entries include a sequence of memory access slot assignments and a port operation code, the scheduler assigns the memory access slots as a continuously repeating sequence based on the sequence of memory access slot assignments,
• the port operation code includes one of a read bit and a write bit and the scheduler selective assigns each of the memory access slots as one of a read slot and a write slot, based on the corresponding port operation code, and
• one of the programmable information entries includes a wrap-around bit at an end of the sequence of memory access slot assignments, the scheduler returns to a first memory access slot of the sequence of memory access slot assignments upon detecting the wrap-around bit.

A method of assigning memory access slots in a network switch to a plurality of network switch ports, each configured for transferring data packets to an external memory, the method comprising:

• storing programmed memory access slot assignment information into a memory;
• selectively assigning memory access slots to the respective network switch ports based on the programmed memory access slot assignment information;
• selecting a slot-to-port assignment configuration from the programmed memory access slot assignment information;
• and
• writing the selected slot-to-port assignment configuration from the memory to an assignment configuration memory within the network switch, the selectively assigning step including assigning the memory access slots to the respective network switch ports based on the selected slot-to-port assignment configuration stored in the assignment configuration memory, wherein
• the storing step comprises setting each slot-to-port assignment within the slot-to-port assign configuration to include one of a read and a write bit for indicating whether a corresponding memory access slot is one of a read and write slot.

A method of assigning memory access slots in a network switch to a plurality of network switch ports, each configured for transferring data packets to an external memory, the method comprising:

• storing programmed memory access slot assignment information and port operation codes into a memory, each port operation code includes one of a read bit and a write bit for setting the operation of each port;
• selectively assigning memory access slots to the respective network switch ports based on the programmed memory access slot assignment information and assigning each of the memory access slots as one of a read slot and a write slot, based on the corresponding port operation code;
• selecting a slot-to-port assignment configuration from the programmed memory access slot assignment information;
• and
• writing the selected slot-to-port assignment configuration from the memory to an assignment configuration memory within the network switch, the selectively assigning step including assigning the memory access slots to the respective network switch ports based on the selected slot-to-port assignment configuration stored in the assignment configuration memory, wherein
• the storing step comprises setting the slot-to-port assignment configuration as a repeating sequence of an N number of memory access slot assignments.

A method of assigning memory access slots in a network switch to a plurality of network switch ports, each configured for transferring data packets to an external memory, the method comprising:

• storing programmed memory access slot assignment information and port operation codes into a memory, each port operation code includes one of a read bit and a write bit for setting the operation of each port;
• selectively assigning memory access slots to the respective network switch ports based on the programmed memory access slot assignment information and assigning each of the memory access slots as one of a read slot and a write slot based on the corresponding port operation code;
• selecting a slot-to-port assignment configuration from the programmed memory access slot assignment information;
• and
• writing the selected slot-to-port assignment configuration from the memory to an assignment configuration memory within the network switch, the selectively assigning step including assigning the memory access slots to the respective network switch ports based on the selected slot-to-port assignment configuration stored in the assignment configuration memory, wherein
• the storing step includes storing into the slot-to-port assignment configuration a wrap-around bit that returns the sequence of an N number of memory access slot assignments to a first memory access slot at a start of the sequence of an N number of memory access slot assignments from an “Nth” memory access slot.

A switched network system comprising:

• a first memory for storing a plurality of programmable system settings;
• a second memory for storing data packets;
• a network switch having a plurality of ports configured for transferring the data packets, the network switch including:
• (1) an external memory interface configured for transferring data packets between the network switch and the second memory, and
• (2) a scheduler for selectively assigning memory access slots to each of the ports for access to the second memory, the selectively assigning memory access slots to each of the ports being based on a selected one of the plurality of programmable system settings stored in the first memory;
• and
• a system controller for supplying the selected one of the plurality of programmable system settings to the network switch, wherein
• the plurality of programmable system settings include a port operation code, for setting the operation of each port the port operation code includes one of a read bit and a write bit and the scheduler assigns the memory access slots as read and write slots, respectively.

A switched network system comprising:

• a first memory for storing a plurality of programmable system settings;
• a second memory for storing data packets;
• a network switch having a plurality of ports configured for transferring the data packets, the network switch including:
• (1) an external memory interface configured for transferring data packets between the network switch and the second memory, and
• (2) a scheduler for selectively assigning memory access slots to each of the ports for access to the second memory, the selectively assigning memory access slots to each of the ports being based on a selected one of the plurality of programmable system settings stored in the first memory;
• and
• a system controller for supplying the selected one of the plurality of programmable system settings to the network switch, wherein
• the plurality of programmable system settings include a sequence of an N number of memory access slot assignments that is continuously repeated by the scheduler in assigning the memory access slots and port operation codes for setting the operation of each port, each port operation code includes one of a read bit and a write bit and the scheduler assigns each of the memory access slots as a read slot and a write slot, respectively.

A switched network system comprising:

• a first memory for storing a plurality of programmable system settings;
• a second memory for storing data packets;
• a network switch having a plurality of ports configured for transferring the data packets, the network switch including:
• (1) an external memory interface configured for transferring data packets between the network switch and the second memory;
• and
• (2) a scheduler for selectively assigning memory access slots to each of the ports for access to the second memory, the selectively assigning memory access slots to each of the ports being based on a selected one of the plurality of programmable system settings stored in the first memory;
• and
• a system controller for supplying the selected one of the plurality of programmable system settings to the network switch, wherein
• the plurality of programmable system settings include a sequence of an N number of memory access slot assignments that is continuously repeated by the scheduler in assigning the memory access slots,
• the plurality of programmable system settings include a sequence of an N number of memory access slot assignments that is continuously repeated by the scheduler in assigning the memory access slots and port operation codes for setting the operation of each port, each port operation code includes one of a read bit and a write bit and the scheduler assigns each of the memory access slots as a read slot and a write slot, respectively, and
• the plurality of programmable system settings include a wrap-around bit at an end of the sequence and the scheduler returns to a first memory access slot at a start of the sequence upon detecting the wrap-around bit.