Method and apparatus for rapidly storing data in memory cell without voltage loss

A method for driving a semiconductor memory device comprising the steps of:

• activating a word line in a first high voltage level in response to an active command and inducing a fine voltage of cell data on the bit line, wherein the first high voltage level is higher than an external voltage level;
• amplifying the fine voltage on the bit line;
• activating the word line in a second high voltage level and restoring the amplified voltage on the bit line, wherein the second high voltage level is higher than the first high voltage level;
• and
• non-activating the word line in response to a precharge command and precharging the bit line.

A semiconductor memory device comprising:

• a driving voltage generating means for producing a driving voltage level using an external voltage level;
• a pumping control signal generating means for producing a pumping control signal, which is activated in a restore section and a write section, in response to a command signal;
• a pumping means for transferring the driving voltage level from the driving voltage generating means or for boosting the external voltage level in order to output a high voltage level which is higher than the external voltage level;
• and
• a bit line sense amplifier for receiving the external voltage level or the high voltage level from the pumping means and amplifying the bit line voltage of a selected memory cell.

A method for driving a semiconductor memory device comprising the steps of:

• amplifying a voltage level corresponding to a cell data, which is induced on a bit line, using an external voltage level;
• restoring the amplified voltage level on the bit line using a high voltage level in response to a write recovery operation, which is higher than the external voltage level;
• and
• non-activating the word line and precharging the bit line.

A method for driving a semiconductor memory device comprising the steps of:

• amplifying a voltage level corresponding to a cell data, which is induced on a bit line, using an external voltage level while a word line is activated by a first high voltage level;
• applying a voltage level corresponding to an input data to the bit line in response to a write command;
• writing the amplified voltage level on the bit line while a word line is activated by a second high voltage level, wherein the second high voltage level is higher than the first high voltage level;
• and
• non-activating the word line and precharging the bit line.