Nonvolatile semiconductor memory and operating method of the memory

A method of operating a memory cell that comprises a first junction region, a second junction region, a base, a nonconducting charge trapping layer and a gate, the method comprising:

• setting the memory cell to an initial state of a first gate threshold voltage;
• performing a processing sequence including:
• applying a voltage bias between the gate and the first junction region to cause electric hole to migrate towards and be retained in the trapping layer;
• evaluating a read current generated in response to the voltage bias to determine whether a second gate threshold voltage is reached, wherein the second gate threshold voltage is lower than the first gate threshold voltage;
• and
• repeating the processing sequence a number of time by varying one or more time the voltage bias between the gate and the first junction region until the second gate threshold voltage is reached and the memory cell is in a program state.