Nonvolatile semiconductor memory having a control gate driver transistor whose gate insulator thickness is greater than that of a select gate driver transistor

A nonvolatile semiconductor memory comprising:

• a plurality of memory sub arrays including a plurality of memory cell units, each of which having a memory cell transistor and a select transistor connected in series;
• a control gate line driver including a control gate line driver transistor connected to a control gate of the memory cell transistor;
• and
• a plurality of select transistor gate line drivers including a select gate line driver transistor connected to a select gate of the select transistor,
• wherein a number of memory sub arrays driven by the control gate line driver is greater than a number of memory sub arrays driven by the select transistor gate line driver.

A nonvolatile semiconductor memory comprising:

• a plurality of memory sub arrays, each of which including a memory cell unit having a memory cell transistor and two select transistors sandwiching the memory cell transistor;
• a control gate line driver including a control gate line driver transistor connected to a control gate of the memory cell transistor;
• and
• a plurality of select transistor gate line drivers including a select gate line driver transistor connected to a select gate of the select transistor,
• wherein a thickness of a gate insulating film of the control gate line driver transistor is thicker than a thickness of a gate insulating film of the select gate line driver transistor.