Method and device for programming an electrically programmable non-volatile semiconductor memory

A circuit for programming memory cells of an electrically programmable memory, comprising:

• a circuit for applying programming pulses to groups of memory cells of an electrically programmable memory;
• a circuit for accessing the memory cells in the group and ascertaining a programming state thereof;
• and
• a control circuit for controlling the circuit for applying programming pulses so that programming pulses are repeatedly applied to the memory cells in the group until the programming state thereof is ascertained to correspond to a desired programming state, wherein
• the control circuit causes the circuit for accessing and ascertaining to access the memory cells in the group and re-ascertain the programming state of the memory cells whose programming state was previously ascertained to correspond to a desired programming state after the programming state of a prescribed number of memory cells in the group has been ascertained to correspond to a desired programming state, and in that
• the control circuit causes the circuit for applying programming pulses to apply at least one additional programming pulse to those memory cells in the group whose programming state is not re-ascertained to correspond to a desired programming state.

An integrated circuit comprising:

• a circuit supporting substrate;
• at least one electrically programmable semiconductor memory being at least partially supported by the circuit supporting substrate;
• and
• a circuit for programming memory cells of the at least one electrically programmable semiconductor memory, the circuit being electrically coupled with the at least one electrically programmable semiconductor memory and further being at least partially supported by the circuit supporting substrate, the circuit comprising:
• a circuit for applying programming pulses to groups of memory cells of the at least one electrically programmable semiconductor memory;
• a circuit for accessing the memory cells in the group and ascertaining a programming state thereof;
• and
• a control circuit for controlling the circuit for applying programming pulses so that programming pulses are repeatedly applied to the memory cells in the group until the programming state thereof is net ascertained to correspond to a desired programming state, wherein
• the control circuit causes the circuit for accessing and ascertaining to access the memory cells in the group and re-ascertain the programming state of the memory cells whose programming state was previously ascertained to correspond to a desired programming state after the programming state of a prescribed number of memory cells in the group has been ascertained to correspond to a desired programming state, and in that
• the control circuit causes the circuit for applying programming pulses to apply at least one additional programming pulse to those memory cells in the group whose programming state is not re-ascertained to correspond to a desired programming state.