Synchronous soft-shutdown gate drive circuit

Abstract

A soft-shutdown circuit for shutting down a power device driven by a gate drive signal applied to a gate of the device, wherein an over-current condition through the device is sensed and a soft-shutdown of the device is initiated upon sensing of the current condition. A latch circuit receives the gate drive signal, latches the gate drive signal upon receipt of a latching signal, and transfers the signal to the gate of the device upon release of the latching signal. The latching signal is sent to the latching circuit upon initiation of the soft-shutdown and is released after completion of the soft-shutdown. Preferably, identical soft-shutdown circuits are incorporated in each of the three gate drive circuits of an AC PWM inverter. Each soft-shutdown circuit includes a bi-direction soft-shutdown pin which, when a soft-shutdown is initiated in a first one of the gate drive circuits, sends a signal to the other gate drive circuits to initiate a soft-shutdown in those gate drive circuits. Similarly, any of the other gate drive circuits can send a signal to the bi-directional pin of the first gate drive circuit to initiate soft-shutdown thereof.

Dependencies are inferred from the claim text.