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US 7,030,915 B2Granted
Signal processing apparatus
AssigneeCanon Kabushiki Kaisha
InventorTakamasa Sakuragi
Life of this patent
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Abstract
A signal transfer gain is prevented from being lowered by parasitic capacitance. A signal processing apparatus is provided which includes switches provided for a plurality of signal sources, a common line to which signals from the plurality of signal sources are sequentially transferred, and a parasitic capacitance control circuit for controlling parasitic capacitance of the common line in accordance with the level of the signal on the common line.
Claims4
A signal processing apparatus comprising:
- a common line for reading a plurality of signals from a plurality of signal sources;
- a plurality of switching means for transferring the signals from the signal sources to said common line;
- a plurality of pixels each including a photoelectric conversion unit, wherein said photoelectric conversion units provide said signal sources for supplying the signals to said switching means;
- and
- a parasitic capacitance controlling unit for controlling a change in potential at one electrode of a parasitic capacitance of said common line depending on a change in a signal level of said common line when the signals are read via said switching means to said common line, wherein said parasitic capacitance controlling unit has a buffer amplifier connected to said common line, said buffer amplifier having an output connected to a back gate of each of said switching means for outputting a voltage to which a DC offset voltage is added, and wherein the DC offset voltage has an absolute value larger than a dynamic range of an output from an amplifying portion included in the pixel, and a polarity for turning off the switching means.
2 more elements
Dependencies are inferred from the claim text.