Current-steering digital-to-analog converter
AssigneeElectronics and Telecommunications Research Institute
InventorsSeung-Chul Lee, Min-Hyung Cho, Chong-Ki Kwon
Life of this patent
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Abstract
Disclosed is a current-steering digital-to-analog converter (DAC) which comprises a decoder for receiving an N-bit digital input signal and converting the same into first and second (N−1)-bit digital signals, M (=2N−1) current cells for supplying the current based on the two digital signals, a current cell driver for generating a first analog voltage and a second analog voltage corresponding to the currents based on the two (N−1)-bit digital signals by control of a first clock signal and a second clock signal, and an amplifying circuit for sampling and holding the first and second analog voltage with reference to the first and second clock signals to generate a glitch-removed signal.
Claims16
A current-steering digital-to-analog converter (DAC) comprising:
- a decoder for receiving an N-bit digital input signal and converting the same into a first (N−1)-bit digital signal and a second (N−1)-bit digital signal;
- M (=2N−1) current cells for supplying the current
- a current cell driver including a first switch group responsive to the first (N−1)-bit digital signal and a second switch group responsive to the second (N−1)-bit digital signal, and generating a first analog voltage corresponding to the first (N−1)-bit digital signals, wherein the first switch group includes a plurality of switches coupled to the M current cells and the second switch group includes a plurality of switches coupled to the M current cells;
- and
- an amplifying circuit for sampling and holding the first analog voltage and the second analog voltage with reference to a first clock signal and a second clock signal to generate a glitch-removed signal.
A current-steering digital-to-analog converter (DAC) comprising:
- a current cell group including M (=2N−1)current cells and supplying a current based on an (N−1)-bit digital signal from among an N-bit digital signal;
- a first current cell for supplying a current based on the least significant bit (LSB) from among the N-bit digital signal;
- a current cell driver;
- including a switch group responsive to the (N−1)-bit digital signal and a first switch responsive to the LSB, and which generates an analog voltage corresponding to the current provided by the current cell group and the first current cell, wherein the switch group includes a plurality of switches coupled to the M current cells of the current cell group and the first switch is coupled to the first current cell;
- and
- an amplifying circuit for sampling and holding the analog voltages with reference to a first clock signal and a second clock signal, and outputting result signals.
A current-steering digital-to-analog converter (DAC) comprising:
- a current cell group including M (=2N−1) current cells and supplying a current based on an (N−1)-bit digital signal and an inverted signal thereof from among an N-bit digital signal;
- a first current cell for supplying a current based on the least significant bit (LSB) and an inverted signal thereof from among the N-bit digital signal;
- a differential current cell driver for generating a first analog voltage and a second analog voltage corresponding to the currents provided by the first and second current cells;
- and
- a differential amplifying circuit for sampling and holding the first and second analog voltages with reference to a first and second clock signal and a second clock signal, and outputting glitch-removed signals.
Dependencies are inferred from the claim text.