Analog multiplexing circuits

A switched input stage circuit for use in a multiplexer, comprising:

• an input to accept an input signal;
• and
• an output;
• said switched input stage configured to, when selected, present a substantially unmodified version of the input signal at its said output;
• and
• said switched input stage configured to, when deselected, produce a rejection voltage signal of substantially equal magnitude and opposite polarity to the input signal in order to reject the input signal and thereby present a substantially constant voltage at its said output regardless of variations in the input signal.

A multiplexer circuit, comprising:

• a plurality of switched differential amplifier circuits each including a pair of differential inputs and a pair of differential outputs, each said switched differential amplifier circuit being configured to present a substantially unmodified version of its input signals at its differential outputs when said switched differential amplifier circuit is selected, and to present substantially zero level output signals at its differential outputs when said switched differential amplifier circuit is deselected, regardless of variations in its input signals;
• a selector that accepts a select signal and selects one of said plurality of switched differential amplifier circuits based on said select signal;
• and
• a current mirror including an input and an output;
• wherein each said pair of differential outputs includes a first output and a second output, and wherein said first outputs are connected together to form a first multiplexer output, and said second outputs are connected together to form a second multiplexer output;
• wherein said current mirror input is connected to said first multiplexer output, and said current mirror output is connected to said second multiplexer output, such that at said current mirror output, a signal output from said first multiplexer output is combined with a signal output from second multiplexer output to thereby produce a single-ended multiplexer output signal;
• and
• wherein each said pair of differential inputs includes a first input and a second input, wherein said second inputs are connected together, and wherein said connected together second inputs accept a fed back version of said single-ended multiplexer output signal.

A multiplexer circuit, comprising:

• a plurality of switched differential amplifier circuits each including a pair of differential inputs and a pair of differential outputs, with each said pair of differential inputs accepting a corresponding pair of input signals, and each said pair of differential outputs including a first output and a second output at which are output corresponding first and second output signals;
• wherein only one of said plurality of switched differential amplifiers is selected at a time, and wherein each switched differential amplifier circuit comprises
• a first switched input stage including an input to accept the first input signal and an output, said first switched input stage configured to present a substantially unmodified version of the first input signal at its output when said first switched input stage is selected, and to present a substantially constant voltage at its output when said first switched input stage is deselected, regardless of variations in the first input signal;
• a second switched input stage including an input to accept the second input signal and an output, said second switched input stage configured to present a substantially unmodified version of the second input signal at its output when said second switched input stage is selected, and to present a substantially constant voltage at its output when said second switched input stage is deselected, regardless of variations in the second input signal;
• a first transistor including a base connected to said output of said first switched input stage, a collector forming said first output of said switched differential amplifier circuit, and an emitter;
• a second transistor including a base connected to said output of said second switched input stage, a collector forming said second output of said switched differential amplifier circuit, and an emitter connected to said emitter of said first transistor;
• and
• a current source selectively connectable to said emitters of said first and second transistors.

A multiplexer circuit, comprising:

• a plurality of switched differential amplifier circuits each including a pair of differential inputs and a pair of differential outputs, with each pair of differential inputs accepting a corresponding pair of input signals including a first input signal and a second input signal;
• wherein each switched differential amplifier includes a first switched input stage and a second switched input stage, with each said switched input stage comprising
• a switched input stage input;
• a switched input stage output;
• a resistor having a first terminal and a second terminal, said first terminal of said resistor connected to said switched input stage input, said second terminal of said resistor connected to said switched input stage output;
• a capacitor connected in parallel with said resistor;
• and
• a transconductor having an input and an output, said transconductor input being connected to said first terminal of said resistor, said transconductor output switchably connectable to said switched input stage output;
• wherein said transconductor output is not connected to said first switched input stage output when said switched input stage is selected;
• and
• wherein said transconductor output is connected to said switched input stage output when said switched input stage is deselected.

A triple 2:1 multiplexer system, comprising:

• a first 2:1 multiplexer that receives an R portion of a first RGB signal from a first video source and an R portion of a second RGB signal from a second video source, a second 2:1 multiplexer that receives a G portion of the first RGB signal from the first video source and a G portion of the second RGB signal from the second video source, a third 2:1 multiplexer that receives a B portion of the first RGB signal from the first video source and a B portion of the second RGB signal from the second video source, wherein each of the first, second and third 2:1 multiplexers includes a pair of switched differential amplifier circuits;
• and
• a selector that accepts a select signal and selects one of said pair of switched differential amplifier circuits within each of said first, second and third 2:1 multiplexers, based on said select signal, to thereby provide either the first RGB signal or the second RGB signal to a display;
• wherein each switched differential amplifier circuit includes
• a first switched input stage including an input to accept a first input signal and an output, said first switched input stage configured to present a substantially unmodified version of the first input signal at its output when said first switched input stage is selected, and to present a substantially constant voltage at its output when said first switched input stage is deselected, regardless of variations in the first input signal;
• and
• a second switched input stage including an input to accept a second input signal and an output, said second switched input stage configured to present a substantially unmodified version of the second input signal at its output when said second switched input stage is selected, and to present a substantially constant voltage at its output when said second switched input stage is deselected, regardless of variations in the second input signal;
• and
• wherein each said switched input stage includes
• a switched input stage input;
• a switched input stage output;
• a resistor having a first terminal and a second terminal, said first terminal of said resistor connected to said switched input stage input, said second terminal of said resistor connected to said switched input stage output;
• a capacitor connected in parallel with said resistor;
• and
• a transconductor having an input and an output, said transconductor input being connected to said first terminal of said resistor, said transconductor output switchably connectable to said switched input stage output;
• wherein said transconductor output is not connected to said first switched input stage output when said switched input stage is selected;
• and
• wherein said transconductor output is connected to said switched input stage output when said switched input stage is deselected.