Back to results
US 7,030,663 B2Granted
Method and apparatus for generating narrow pulse width monocycles
AssigneeFreescale Semiconductor, Inc.
InventorsJohn W. McCorkle, Phuong T. Huynh, Agustin Ochoa
Life of this patent
Estimating the term…
Abstract
A monocycle forming network may include a monocycle generator, up and down pulse generators, data modulators and clock generation circuits. The network may generate monocycle pulses having very narrow pulse widths, approximately 80 picoseconds peak to peak. The monocycles may be modulated to carry data in ultra-wideband communication systems.
Claims11
A monocycle generator, comprising:
- a pair of transistors, a first transistor coupled to a first voltage source, a second transistor coupled to a second voltage source, both the first and second transistors coupled to a common output terminal,
- means for maintaining the output terminal at a voltage intermediate between the first and second voltages when the first and second transistors are non-conductive,
- a third transistor coupling the means to the first voltage source,
- a fourth transistor coupling the means to the second voltage source, and
- a second pair of transistors, one coupled to the first voltage source, another coupled to the second voltage source, both coupled to a second output terminal,
- wherein the means comprises a third pair of transistors bridging between the first and second output terminals and a reference potential coupled to a node between the third pair of transistors.
3 more elements
A monocycle generator, comprising:
- a pair of pull up transistors, each coupled to respective ones of first and second output terminals and to a first voltage source,
- a pair of pull down transistors, each coupled to respective ones of the first and second output terminals and to a second voltage source,
- a pair of transistors bridging between the first and second output terminals,
- a reference potential coupled to a node between the two bridging transistors,
- wherein the pair of transistors bridging between the first and second output terminals are made conductive when all of the pull up and pull down transistors are non-conductive, and are made non-conductive when any of the pull up and pull down transistors are conductive.
2 more elements
Dependencies are inferred from the claim text.