High density chip carrier with integrated passive devices
AssigneeInternation Business Machines Corporation
InventorsMichael Patrick Chudzik, Robert H. Dennard, Rama Divakaruni, Bruce Kenneth Furman, Rajarao Jammy, Chandrasekhar Narayan, Sampath Purushothaman, Joseph F. Shepard, Jr., Anna Wanda Topol
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Abstract
A carrier for a semiconductor component is provided having passive components integrated in its substrate. The passive components include decoupling components, such as capacitors and resistors. A set of connections is integrated to provide a close electrical proximity to the supported components.
Claims52
An integrally formed semiconductor carrier structure for interconnecting semiconductor components comprising:
- a semiconductor substrate layer having at least one via constructed therein;
- a first interface layer deposited on said substrate having a connection to at least one semiconductor component;
- a second interface layer deposited on said substrate having a connection to a level of packaging formed through said at least one via;
- at least one passive component deposited on said substrate layer;
- and
- a set of conductive components, formed on said substrate, and associated with said first and/or second interface layers to connect said at least one passive component to said semiconductor components and/or said level of packaging.
An integrally formed semiconductor carrier for interconnecting semiconductor components comprising:
- a semiconductor substrate layer having at least one via constructed therein;
- a first interface layer deposited on said substrate having a connection to at least one semiconductor component;
- a second interface deposited on said substrate having a connection to a level of packaging formed through said at least on via;
- an array of trenches extending into said substrate layer from a surface thereof and adapted to function as components;
- and
- a set of conductive components associated with said first interface to interconnect said trench components and to connect said trench components to said semiconductor components.
A carrier for interconnecting semiconductor components comprising:
- a semiconductor substrate layer having at least one via constructed therein;
- a first interface deposited on said substrate having a connection to at least one semiconductor component;
- a second interface deposited on said substrate having a connection to a level of packaging;
- at least one memory cell formed in said substrate layer;
- and
- a set of conductive components associated with said first interface to connect said memory cell to said semiconductor components.
A carrier far interconnecting semiconductor components comprising:
- a semiconductor substrate layer having at least one via constructed therein;
- a first interface layer deposited on said substrate having a connection to at least one semiconductor component;
- a second interface layer deposited on said substrate having a connection to a level of packaging;
- at least one optoelectronic structure in said substrate layer;
- and
- a set of conductive components associated with said first interface to connect said optoelectronic structure to said semiconductor components.
Dependencies are inferred from the claim text.