Semiconductor constructions and electronic systems comprising metal silicide
AssigneeMicron Technology, Inc.
InventorYongjun Jeff Hu
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Abstract
The invention includes methods of forming metal silicide having bulk resistance of less than 30 micro-ohms-centimeter. The metal of the metal silicide can be selected from Groups 3, 4, 8, 9 and 10 of the periodic table, with an exemplary metal being titanium. An exemplary method includes forming a titanium-containing layer directly against tantalum silicide. After the titanium-containing layer is formed directly against the tantalum silicide, titanium of the titanium-containing layer is converted to titanium silicide. Constructions formed in accordance with methodology of the present invention can be incorporated into circuitry associated with semiconductor devices, such as, for example, wordlines and bitlines.
Claims20
A semiconductor construction, comprising:
- a semiconductor substrate comprising monocrystalline silicon;
- a first metal silicide layer over the semiconductor substrate, the first metal silicide layer being predominantly MSi2 where M is one or more of Hf, Mo, Ta and W;
- the first metal silicide layer having a thickness of at least about 50 Å;
- a second metal silicide layer over and directly against the first metal silicide layer, the second metal silicide layer being predominantly QSi2 where Q is selected from Groups 3, 4, 8, 9 and 10 of the periodic table, wherein the metals of Q are different from the metals of M, and wherein the second metal silicide layer has a thickness of at least about 100 Å;
- a conductively-doped silicon-containing layer over and directly against the second metal silicide layer;
- and
- wherein the first metal silicide layer, second metal silicide layer and conductively-doped silicon-containing layer are all part of a line stack having substantially vertical sidewalls extending along the first metal silicide layer, second metal silicide layer and conductively-doped silicon-containing layer.
An electronic system comprising:
- a monocrystalline silicon substrate;
- DRAM array supported by the substrate and containing wordlines and bitlines;
- and
- wherein at least one of the wordlines and bitlines comprises a stack which includes a first layer consisting of TaSi2 over the substrate, a second layer consisting of TiSi2 over and directly against the first layer, and a third layer containing conductively-doped silicon over and directly against the second layer.
Dependencies are inferred from the claim text.