Fabrication method and device structure of shallow trench insulation for silicon wafer containing silicon-germanium

A method of fabricating a semiconductor device, the method comprising:

• preparing a semiconductor substrate having a single crystal silicon-germanium layer and a first single crystal silicon layer formed on said single crystal silicon-germanium layer;
• forming a first silicon oxide layer on the surface of said first single crystal silicon layer;
• forming a silicon nitride layer on said first silicon oxide layer;
• forming a trench region to a depth extending into said single crystal silicon-germanium layer on a multi-layer structure made from said single crystal silicon-germanium layer, said first single crystal silicon layer, said first silicon oxide layer, and said silicon nitride layer;
• forming a second single crystal silicon layer inside trench region and a polycrystalline layer on a side wall of said silicon nitride layer;
• forming a second silicon oxide layer on said second single crystal silicon layer and said polycrystalline layer;
• forming a third silicon oxide layer inside said trench region and over said silicon nitride layer;
• leveling said third silicon oxide layer by chemical-mechanical polishing, using said silicon nitride layer as a mechanical stopper as said polycrystalline layer remains, thereby forming a device isolation region;
• removing said silicon nitride layer;
• oxidizing said polycrystalline layer after the step of leveling said third silicon oxide layer;
• and
• forming a device in an active region separated by said device isolation region,
• wherein the step of forming said device in said active region includes forming a doped region of a depth to reach within said single crystal silicon-germanium layer below said first single crystal silicon layer.

A method of fabricating a semiconductor device, the method comprising:

• preparing a semiconductor substrate having a single crystal silicon-germanium layer and a first single crystal silicon layer formed on said single crystal silicon-germanium layer;
• forming a first silicon oxide layer on the surface of said first single crystal silicon layer;
• forming a silicon nitride layer on said first silicon oxide layer;
• forming a trench region to a depth extending into said single crystal silicon-germanium layer on a multi-layer structure made from said single crystal silicon-germanium layer, said first single crystal silicon layer, said first silicon oxide layer, and said silicon nitride layer;
• forming a second single crystal silicon layer inside said trench region by selective epitaxial growth;
• forming a second silicon oxide layer on said second single crystal silicon layer;
• forming a third silicon oxide layer inside said trench region and over said silicon nitride layer;
• leveling said third silicon oxide layer by chemical-mechanical polishing, using said silicon nitride layer as a mechanical stopper, thereby forming a device isolation region;
• removing said silicon nitride layer;
• and
• forming a device in an active region separated by said device isolation region,
• wherein the step of forming said device in said active region includes forming a doped region of a depth to reach within said single crystal silicon-germanium layer below said first single crystal silicon layer.